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| author | Peng Fan <Peng.Fan@freescale.com> | 2014-12-31 11:01:40 +0800 |
|---|---|---|
| committer | Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> | 2014-12-31 14:52:32 +0530 |
| commit | fad7d735a001a542a2aae60cb1a68a70a4bb0245 (patch) | |
| tree | 3b08d8afda4f2ad30bdbfbd2464b4d3cbb471761 /include | |
| parent | ba4dc8ab7260b2afb0f9d5de0ae9c3723e699df0 (diff) | |
| download | u-boot-imx-fad7d735a001a542a2aae60cb1a68a70a4bb0245.zip u-boot-imx-fad7d735a001a542a2aae60cb1a68a70a4bb0245.tar.gz u-boot-imx-fad7d735a001a542a2aae60cb1a68a70a4bb0245.tar.bz2 | |
imx:mx6sxsabresd add qspi support
Configure the pad setting and enable qspi clock to support qspi
flashes access.
Add QSPI related macro in configuration header file.
Note:
mx6sxsabresd Revb board, 32M flash is used, but in header file,
CONFIG_SPI_FLASH_BAR is not defined, and we still use SZ_16M.
The LUT initialization qspi_set_lut function uses 32BIT addr,
however CONFIG_SPI_FLASH_BAR and 24BIT addr should be used to
access bigger than 16MB size flash, and BRRD/BRWR should also
be supported. Future patches will fix this.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/mx6sxsabresd.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 61a7a7a..469d250 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -235,6 +235,18 @@ /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH +#define CONFIG_FSL_QSPI + +#ifdef CONFIG_FSL_QSPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SYS_FSL_QSPI_LE +#define FSL_QSPI_FLASH_SIZE SZ_16M +#define FSL_QSPI_FLASH_NUM 2 +#endif + #define CONFIG_ENV_OFFSET (6 * SZ_64K) #define CONFIG_ENV_SIZE SZ_8K #define CONFIG_ENV_IS_IN_MMC |