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| author | wdenk <wdenk> | 2005-03-06 01:21:30 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2005-03-06 01:21:30 +0000 |
| commit | f4733a0764741966a5e842968166b40fb062d577 (patch) | |
| tree | 2fb8f9d690db7cca7aa1808899a3a589c456adf4 /include | |
| parent | b05dcb58fe04c6274fc942fa93efe77072395951 (diff) | |
| download | u-boot-imx-f4733a0764741966a5e842968166b40fb062d577.zip u-boot-imx-f4733a0764741966a5e842968166b40fb062d577.tar.gz u-boot-imx-f4733a0764741966a5e842968166b40fb062d577.tar.bz2 | |
Add port initialization for digital I/O on INKA4x0
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/inka4x0.h | 5 | ||||
| -rw-r--r-- | include/mpc5xxx.h | 15 |
2 files changed, 20 insertions, 0 deletions
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index 038ab75..c817d2c 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -274,6 +274,11 @@ #define CFG_CS2_SIZE 0x0001000 #define CFG_CS2_CFG 0x21800 /* for pci_clk = 33 MHz */ +/* GPIO in @0x30400000 */ +#define CFG_CS3_START 0x30400000 +#define CFG_CS3_SIZE 0x00100000 +#define CFG_CS3_CFG 0x31800 /* for pci_clk = 33 MHz */ + #define CFG_CS_BURST 0x00000000 #define CFG_CS_DEADCYCLE 0x33333333 diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h index e5c8c02..565e1cf 100644 --- a/include/mpc5xxx.h +++ b/include/mpc5xxx.h @@ -233,6 +233,21 @@ /* General Purpose Timers registers */ #define MPC5XXX_GPT0_ENABLE (MPC5XXX_GPT + 0x0) #define MPC5XXX_GPT0_COUNTER (MPC5XXX_GPT + 0x4) +#define MPC5XXX_GPT1_ENABLE (MPC5XXX_GPT + 0x10) +#define MPC5XXX_GPT1_COUNTER (MPC5XXX_GPT + 0x14) +#define MPC5XXX_GPT2_ENABLE (MPC5XXX_GPT + 0x20) +#define MPC5XXX_GPT2_COUNTER (MPC5XXX_GPT + 0x24) +#define MPC5XXX_GPT3_ENABLE (MPC5XXX_GPT + 0x30) +#define MPC5XXX_GPT3_COUNTER (MPC5XXX_GPT + 0x34) +#define MPC5XXX_GPT4_ENABLE (MPC5XXX_GPT + 0x40) +#define MPC5XXX_GPT4_COUNTER (MPC5XXX_GPT + 0x44) +#define MPC5XXX_GPT5_ENABLE (MPC5XXX_GPT + 0x50) +#define MPC5XXX_GPT5_COUNTER (MPC5XXX_GPT + 0x54) +#define MPC5XXX_GPT6_ENABLE (MPC5XXX_GPT + 0x60) +#define MPC5XXX_GPT6_COUNTER (MPC5XXX_GPT + 0x64) +#define MPC5XXX_GPT7_ENABLE (MPC5XXX_GPT + 0x70) +#define MPC5XXX_GPT7_COUNTER (MPC5XXX_GPT + 0x74) + /* ATA registers */ #define MPC5XXX_ATA_HOST_CONFIG (MPC5XXX_ATA + 0x0000) |