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author | Jaehoon Chung <jh80.chung@samsung.com> | 2014-05-16 13:59:54 +0900 |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2014-05-16 14:54:26 +0900 |
commit | d22e3d46a918bde2e6d3bc3f5782548d5ed75358 (patch) | |
tree | b1f31b604bbb1ca8e8cc0c746ec38428d0ed291e /include | |
parent | 8caf46d1890b625aafe9cc16114b3c65842dbb98 (diff) | |
download | u-boot-imx-d22e3d46a918bde2e6d3bc3f5782548d5ed75358.zip u-boot-imx-d22e3d46a918bde2e6d3bc3f5782548d5ed75358.tar.gz u-boot-imx-d22e3d46a918bde2e6d3bc3f5782548d5ed75358.tar.bz2 |
mmc: support the DDR mode for eMMC
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/mmc.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/mmc.h b/include/mmc.h index d5a896f..aa2d1ca 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -38,6 +38,7 @@ #define MMC_MODE_8BIT (1 << 3) #define MMC_MODE_SPI (1 << 4) #define MMC_MODE_HC (1 << 5) +#define MMC_MODE_DDR_52MHz (1 << 6) #define SD_DATA_4BIT 0x00040000 @@ -169,10 +170,16 @@ #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ +#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) +#define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) +#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ + | EXT_CSD_CARD_TYPE_DDR_1_2V) #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ +#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ +#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) |