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authorKim Phillips <kim.phillips@freescale.com>2009-09-25 18:19:44 -0500
committerKim Phillips <kim.phillips@freescale.com>2009-09-26 21:19:38 -0500
commitc7190f028fa950d4d36b6d0b4bb3fc72602ec54c (patch)
treeea0ece278a5c2ac1bae9a1bdbe66ba796368f55f /include
parent00ec0ff549b8cb6fb6d40e275aeb5a460642a3bd (diff)
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mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields
some LCRR bits are not documented throughout the 83xx family RMs. New board porters copying similar board configurations might omit setting e.g., DBYP since it was not documented in their SoC's RM. Prevent them bricking their board by retaining power on reset values in bit fields that the board porter doesn't explicitly configure via CONFIG_SYS_<registername>_<bitfield> assignments in the board config file. also move LCRR assignment to cpu_init_r[am] to help ensure no transactions are being executed via the local bus while CLKDIV is being modified. also start to use i/o accessors. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/MPC8313ERDB.h3
-rw-r--r--include/configs/MPC8315ERDB.h3
-rw-r--r--include/configs/MPC8323ERDB.h3
-rw-r--r--include/configs/MPC832XEMDS.h3
-rw-r--r--include/configs/MPC8349EMDS.h3
-rw-r--r--include/configs/MPC8349ITX.h3
-rw-r--r--include/configs/MPC8360EMDS.h3
-rw-r--r--include/configs/MPC8360ERDK.h3
-rw-r--r--include/configs/MPC837XEMDS.h3
-rw-r--r--include/configs/MPC837XERDB.h3
-rw-r--r--include/configs/MVBLM7.h3
-rw-r--r--include/configs/SIMPC8313.h4
-rw-r--r--include/configs/TQM834x.h3
-rw-r--r--include/configs/kmeter1.h4
-rw-r--r--include/configs/sbc8349.h3
-rw-r--r--include/configs/vme8349.h3
16 files changed, 34 insertions, 16 deletions
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 76b7894..5927e76 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -216,7 +216,8 @@
/*
* Local Bus LCRR and LBCR regs
*/
-#define CONFIG_SYS_LCRR LCRR_EADC_1 | LCRR_CLKDIV_4
+#define CONFIG_SYS_LCRR_EADC LCRR_EADC_1
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR ( 0x00040000 /* TODO */ \
| (0xFF << LBCR_BMT_SHIFT) \
| 0xF ) /* 0x0004ff0f */
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 84cc9fa..8eaff5d 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -182,7 +182,8 @@
/*
* Local Bus Configuration & Clock Setup
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_2)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2
#define CONFIG_SYS_LBC_LBCR 0x00040000
/*
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index c40d3d3..356586c 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -170,7 +170,8 @@
/*
* Local Bus Configuration & Clock Setup
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_2)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2
#define CONFIG_SYS_LBC_LBCR 0x00000000
/*
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index f16616c..f17f9c7 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -159,7 +159,8 @@
/*
* Local Bus Configuration & Clock Setup
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_2)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2
#define CONFIG_SYS_LBC_LBCR 0x00000000
/*
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 9b2d25a..6361c45 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -206,7 +206,8 @@
* External Local Bus rate is
* CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR 0x00000000
/*
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 3b4e344..eaa59fd 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -317,7 +317,8 @@ boards, we say we have two, but don't display a message if we find only one. */
* External Local Bus rate is
* CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR 0x00000000
#define CONFIG_SYS_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index 62cf13b..8520155 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -185,7 +185,8 @@
/*
* Local Bus Configuration & Clock Setup
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR 0x00000000
/*
diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h
index cb0535c..6cee78a 100644
--- a/include/configs/MPC8360ERDK.h
+++ b/include/configs/MPC8360ERDK.h
@@ -177,7 +177,8 @@
/*
* Local Bus Configuration & Clock Setup
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR 0x00000000
/*
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index a190a50..abeb6a2 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -220,7 +220,8 @@
/*
* Local Bus Configuration & Clock Setup
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_8)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
#define CONFIG_SYS_LBC_LBCR 0x00000000
/*
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 89fafe7..7ef92f7 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -243,7 +243,8 @@
/*
* Local Bus Configuration & Clock Setup
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_8)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
#define CONFIG_SYS_LBC_LBCR 0x00000000
/*
diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h
index 9835567..f8b016f 100644
--- a/include/configs/MVBLM7.h
+++ b/include/configs/MVBLM7.h
@@ -137,7 +137,8 @@
* External Local Bus rate is
* CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR 0x00000000
/* LB sdram refresh timer, about 6us */
diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h
index 866ff17..f68d834 100644
--- a/include/configs/SIMPC8313.h
+++ b/include/configs/SIMPC8313.h
@@ -111,7 +111,9 @@
/*
* Local Bus LCRR and LBCR regs
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_EADC_1 | LCRR_CLKDIV_2)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_EADC LCRR_EADC_1
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2
#define CONFIG_SYS_LBC_LBCR (0x00040000 /* TODO */ \
| (0xFF << LBCR_BMT_SHIFT) \
| 0xF ) /* 0x0004ff0f */
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index da08b7c..4c909e6 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -52,7 +52,8 @@
* External Local Bus rate is
* CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_8)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
/* board pre init: do not call, nothing to do */
#undef CONFIG_BOARD_EARLY_INIT_F
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index 79d8638..bec08da 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -170,7 +170,9 @@
/*
* Local Bus Configuration & Clock Setup
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_EADC_2 | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_EADC LCRR_EADC_2
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
/*
* Init Local Bus Memory Controller:
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 6f574ca..bf7cf82 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -197,7 +197,8 @@
* External Local Bus rate is
* CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR 0x00000000
#undef CONFIG_SYS_LB_SDRAM /* if board has SDRAM on local bus */
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index 5304ec9..d0690fe 100644
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -178,7 +178,8 @@
* External Local Bus rate is
* CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
*/
-#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LCRR_DBYP LCRR_DBYP
+#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
#define CONFIG_SYS_LBC_LBCR 0x00000000
#undef CONFIG_SYS_LB_SDRAM /* if board has SDRAM on local bus */
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