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author | Heiko Schocher <hs@denx.de> | 2014-11-18 09:41:58 +0100 |
---|---|---|
committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2015-01-19 12:49:28 +0100 |
commit | a1655bb2e1e2bf8f30f40b46d1bb7a45810634be (patch) | |
tree | 2b66296e338510249024f4a959d421e15ea070a9 /include | |
parent | 389aee89308daf67c540e80aafd1d2f1a694f0e8 (diff) | |
download | u-boot-imx-a1655bb2e1e2bf8f30f40b46d1bb7a45810634be.zip u-boot-imx-a1655bb2e1e2bf8f30f40b46d1bb7a45810634be.tar.gz u-boot-imx-a1655bb2e1e2bf8f30f40b46d1bb7a45810634be.tar.bz2 |
taurus, spl: erase also spi flash if recovery button is pressed
if in SPL mode recovery button is pressed, erase also spi flash
from offset 0 to CONFIG_SYS_NAND_U_BOOT_SIZE on the taurus board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/taurus.h | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 06725cd..65468ad 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -142,6 +142,19 @@ #define TAURUS_SPI_MASK (1 << 4) #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 +#if defined(CONFIG_SPL_BUILD) +/* SPL related */ +#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#endif + /* load address */ #define CONFIG_SYS_LOAD_ADDR 0x22000000 @@ -176,8 +189,11 @@ /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x0 -#define CONFIG_SPL_MAX_SIZE (11 * 1024) +#define CONFIG_SPL_MAX_SIZE (14 * 1024) #define CONFIG_SPL_STACK (16 * 1024) +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ + CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE #define CONFIG_SPL_BSS_MAX_SIZE (3 * 1024) |