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| author | Simon Glass <sjg@chromium.org> | 2013-04-15 11:25:21 +0000 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2013-04-15 16:26:43 -0700 |
| commit | 617c246f3c123d4a2d4dba9d08a4a2dd324cb407 (patch) | |
| tree | 62f39cadf4242175bcd8703c71a0ae4fef6e0a87 /include | |
| parent | 7525c2dac76bd739b8a1673e020031dc4a4934c4 (diff) | |
| download | u-boot-imx-617c246f3c123d4a2d4dba9d08a4a2dd324cb407.zip u-boot-imx-617c246f3c123d4a2d4dba9d08a4a2dd324cb407.tar.gz u-boot-imx-617c246f3c123d4a2d4dba9d08a4a2dd324cb407.tar.bz2 | |
x86: config: Init PCI before SPI
Since the ICH SPI controller uses PCI, we must ensure that PCI is available
before it is inited.
This fixes the current "ICH SPI: Cannot find device" message on boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/coreboot.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index a4aa8f7..5bacc77 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -41,6 +41,7 @@ #define CONFIG_INTEL_CORE_ARCH /* Sandy bridge and ivy bridge chipsets. */ #define CONFIG_ZBOOT_32 #define CONFIG_PHYSMEM +#define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_LMB #define CONFIG_OF_LIBFDT |