diff options
author | Tom Rini <trini@ti.com> | 2014-08-29 11:06:51 -0400 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2014-08-29 11:06:51 -0400 |
commit | 5a1095a830299aef8dd32495e505e92ab1749e89 (patch) | |
tree | 9383de2534455119d51200bc87766a330591df27 /include | |
parent | 6af857c50df4e62ec08e51ad73c96f63f1480386 (diff) | |
parent | d145878d59c80a44d8c6e6d606b898ab87d205ee (diff) | |
download | u-boot-imx-5a1095a830299aef8dd32495e505e92ab1749e89.zip u-boot-imx-5a1095a830299aef8dd32495e505e92ab1749e89.tar.gz u-boot-imx-5a1095a830299aef8dd32495e505e92ab1749e89.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/aristainetos.h | 325 | ||||
-rw-r--r-- | include/configs/embestmx6boards.h | 2 | ||||
-rw-r--r-- | include/configs/gw_ventana.h | 5 | ||||
-rw-r--r-- | include/configs/imx6_spl.h | 1 | ||||
-rw-r--r-- | include/configs/m53evk.h | 2 | ||||
-rw-r--r-- | include/configs/mx31pdk.h | 2 | ||||
-rw-r--r-- | include/configs/mx6_common.h | 2 | ||||
-rw-r--r-- | include/configs/mx6sxsabresd.h | 216 | ||||
-rw-r--r-- | include/configs/mxs.h | 2 | ||||
-rw-r--r-- | include/configs/tqma6.h | 483 |
10 files changed, 1036 insertions, 4 deletions
diff --git a/include/configs/aristainetos.h b/include/configs/aristainetos.h new file mode 100644 index 0000000..20aea85 --- /dev/null +++ b/include/configs/aristainetos.h @@ -0,0 +1,325 @@ +/* + * (C) Copyright 2014 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * Copyright (C) 2012 Freescale Semiconductor, Inc. + * + * Configuration settings for the Freescale i.MX6Q SabreSD board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __ARISTAINETOS_CONFIG_H +#define __ARISTAINETOS_CONFIG_H + +#define CONFIG_MX6 + +#include "mx6_common.h" +#include <linux/sizes.h> + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> + +#define CONFIG_MACH_TYPE 4501 +#define CONFIG_MMCROOT "/dev/mmcblk0p2" +#define CONFIG_DEFAULT_FDT_FILE "aristainetos.dtb" +#define CONFIG_HOSTNAME aristainetos +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MXC_GPIO + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART5_BASE +#define CONFIG_CONSOLE_DEV "ttymxc4" + +#define CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 + +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL + +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_MTD +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 3 +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 20)<<8)) +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_SETEXPR +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "uimage=uImage\0" \ + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdt_addr_r=0x11000000\0" \ + "kernel_addr_r=0x12000000\0" \ + "kernel_file=uImage\0" \ + "boot_fdt=try\0" \ + "ip_dyn=yes\0" \ + "console=" CONFIG_CONSOLE_DEV "\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "mmcpart=1\0" \ + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} " \ + "${uimage}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} " \ + "${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs;run loadimage loadfdt fdt_setup;" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r};\0" \ + "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-sato-sdk\0" \ + "nfsopts=nfsvers=3 nolock rw\0" \ + "netdev=eth0\0" \ + "fdt_setup=fdt addr ${fdt_addr_r};fdt resize;fdt chosen;fdt board\0"\ + "load_fdt=tftp ${fdt_addr_r} ${fdt_file}\0" \ + "load_kernel=tftp ${kernel_addr_r} ${kernel_file}\0" \ + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "get_env=mw ${loadaddr} 0x00000000 0x20000;" \ + "tftp ${loadaddr} /tftpboot/aristainetos/env.txt;" \ + "env import -t ${loadaddr}\0" \ + "addmisc=setenv bootargs ${bootargs} maxcpus=1 loglevel=8\0" \ + "bootargs_defaults=setenv bootargs ${console} ${mtdoops} " \ + "${optargs}\0" \ + "net_args=run bootargs_defaults;setenv bootargs ${bootargs} " \ + "root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \ + "${hostname}:${netdev}:off\0" \ + "net_nfs=run load_kernel load_fdt;run net_args addmtd addmisc;" \ + "run fdt_setup;bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "uboot=/tftpboot/aristainetos/u-boot.imx\0" \ + "load_uboot=tftp ${loadaddr} ${uboot}\0" \ + "uboot_sz=c0000\0" \ + "upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \ + "mw.b 10200000 0x00 ${uboot_sz};" \ + "run load_uboot;sf probe;sf erase 0 ${uboot_sz};" \ + "sf write ${loadaddr} 400 ${filesize};" \ + "sf read 10200000 400 ${uboot_sz};" \ + "cmp.b ${loadaddr} 10200000 bc000\0" \ + "ubi_prep=ubi part ubi 2048;ubifsmount ubi:kernel\0" \ + "load_kernel_ubi=ubifsload ${kernel_addr_r} uImage\0" \ + "load_fdt_ubi=ubifsload ${fdt_addr_r} aristainetos.dtb\0" \ + "ubi_nfs=run ubiprep load_kernel_ubi load_fdt_ubi;" \ + "run net_args addmtd addmisc;run fdt_setup;" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "rootfsname=rootfs\0" \ + "ubi_args=run bootargs_defaults;setenv bootargs ${bootargs} " \ + "ubi.mtd=0,2048 root=ubi0:${rootfsname} rootfstype=ubifs " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \ + "${hostname}:${netdev}:off\0" \ + "ubi_ubi=run ubi_prep load_kernel_ubi load_fdt_ubi;" \ + "run bootargs_defaults ubi_args addmtd addmisc;" \ + "run fdt_setup;bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "ubirootfs_file=/tftpboot/aristainetos/rootfs-minimal.ubifs\0" \ + "upd_ubirootfs=run ubi_prep;tftp ${loadaddr} ${ubirootfs_file};" \ + "ubi write ${loadaddr} rootfs ${filesize}\0" \ + "ksz=800000\0" \ + "rootsz=2000000\0" \ + "usersz=8000000\0" \ + "ubi_make=run ubi_prep;ubi create kernel ${ksz};" \ + "ubi create rootfs ${rootsz};ubi create userfs ${usersz}\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev};" \ + "if mmc rescan; then " \ + "run mmcboot;" \ + "else run ubi_ubi; fi" + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_STACKSIZE (128 * 1024) + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (12 * 1024) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SECT_SIZE (0x010000) +#define CONFIG_ENV_OFFSET (0x0c0000) +#define CONFIG_ENV_OFFSET_REDUND (0x0d0000) + +#define CONFIG_OF_LIBFDT + +#define CONFIG_CMD_CACHE + +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0x7f +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} } + +#define CONFIG_CMD_GPIO +#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15) + +/* NAND stuff */ +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 + +/* RTC */ +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_SYS_RTC_BUS_NUM 2 +#define CONFIG_RTC_M41T11 +#define CONFIG_CMD_DATE + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15) +#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(3, 31) + +/* UBI support */ +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS + +#define MTDIDS_DEFAULT "nand0=gpmi-nand" +#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:-(ubi)" + +#define CONFIG_MTD_UBI_FASTMAP +#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1 + +#define CONFIG_HW_WATCHDOG +#define CONFIG_IMX_WATCHDOG + +#define CONFIG_FIT + +/* Framebuffer */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +/* check this console not needed, after test remove it */ +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_IPUV3_CLK 198000000 +#define CONFIG_IMX_VIDEO_SKIP + +#define CONFIG_CMD_BMP + +#define CONFIG_PWM_IMX +#define CONFIG_IMX6_PWM_PER_CLK 66000000 + +#endif /* __ARISTAINETOS_CONFIG_H */ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index f1000f3..a7fd43b 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -19,6 +19,8 @@ #include "mx6_common.h" #include <linux/sizes.h> +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_MXC_UART_BASE UART2_BASE #define CONFIG_CONSOLE_DEV "ttymxc1" #define CONFIG_MMCROOT "/dev/mmcblk1p2" diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 8197a72..b991b09 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -95,7 +95,9 @@ #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_GSC 0 +#define CONFIG_I2C_PMIC 1 /* MMC Configs */ #define CONFIG_FSL_ESDHC @@ -164,6 +166,7 @@ #define CONFIG_CMD_SETEXPR #define CONFIG_CMD_BOOTZ #define CONFIG_CMD_GSC +#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ #define CONFIG_CMD_UBI #define CONFIG_RBTREE #define CONFIG_LZO diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 6fdc438..970460d 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -24,6 +24,7 @@ * and some padding thus 'our' max size is really 0x00908000 - 0x00918000 * or 64KB */ +#define CONFIG_SYS_THUMB_BUILD #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x00908000 #define CONFIG_SPL_MAX_SIZE (64 * 1024) diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index 6e5200d..df6a226 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -175,7 +175,7 @@ #ifdef CONFIG_CMD_I2C #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */ +#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ #endif /* diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index f796a41..bc4583b 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -20,6 +20,8 @@ #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ #define CONFIG_MX31 /* in a mx31 */ +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index e4a5cc5..135a3f5 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -28,4 +28,6 @@ #define CONFIG_SYS_PL310_BASE L2_PL310_BASE #endif +#define CONFIG_MP + #endif diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h new file mode 100644 index 0000000..1eda65e --- /dev/null +++ b/include/configs/mx6sxsabresd.h @@ -0,0 +1,216 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * Configuration settings for the Freescale i.MX6SX Sabresd board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/imx-regs.h> +#include <linux/sizes.h> +#include "mx6_common.h" + +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_MXC_GPIO + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include <config_cmd_default.h> + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_LOADADDR 0x80800000 +#define CONFIG_SYS_TEXT_BASE 0x87800000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=zImage\0" \ + "console=ttymxc0\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_file=imx6sx-sdb.dtb\0" \ + "fdt_addr=0x88000000\0" \ + "boot_fdt=try\0" \ + "ip_dyn=yes\0" \ + "mmcdev=0\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev};" \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else run netboot; fi" + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 256 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_STACKSIZE SZ_128K + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define PHYS_SDRAM_SIZE SZ_1G + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* MMC Configuration */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 + +/* Network */ +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII + +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1 + +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" + +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_OFFSET (6 * SZ_64K) +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#endif /* __CONFIG_H */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 5f4e48e..eb96fc1 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -93,8 +93,6 @@ /* U-Boot general configuration */ #define CONFIG_SYS_LONGHELP -#ifndef CONFIG_SYS_PROMPT -#endif #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h new file mode 100644 index 0000000..2705d2c --- /dev/null +++ b/include/configs/tqma6.h @@ -0,0 +1,483 @@ +/* + * Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com> + * + * Configuration settings for the TQ Systems TQMa6<Q,S> module. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#include <asm/arch/imx-regs.h> +#include <asm/imx-common/gpio.h> +#include <linux/sizes.h> + +#define CONFIG_MX6 + +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#define PHYS_SDRAM_SIZE (512u * SZ_1M) +#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) +#define PHYS_SDRAM_SIZE (1024u * SZ_1M) +#endif + +#if defined(CONFIG_MBA6) + +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#define CONFIG_DEFAULT_FDT_FILE "imx6dl-mba6x.dtb" +#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q) +#define CONFIG_DEFAULT_FDT_FILE "imx6q-mba6x.dtb" +#endif + +#endif + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_SYS_GENERIC_BOARD + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_MXC_GPIO +#define CONFIG_MXC_UART + +/* SPI */ +#define CONFIG_CMD_SPI +#define CONFIG_MXC_SPI + +/* SPI Flash */ +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(3, 19) << 8)) +#define CONFIG_SF_DEFAULT_SPEED 50000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C_SPEED 100000 + +/* I2C SYSMON (LM75) */ +#define CONFIG_DTT_LM75 +#if defined(CONFIG_MBA6) +#define CONFIG_DTT_SENSORS { 0, 1 } +#else +#define CONFIG_DTT_SENSORS { 0 } +#endif +#define CONFIG_DTT_MAX_TEMP 70 +#define CONFIG_DTT_MIN_TEMP -30 +#define CONFIG_DTT_HYSTERESIS 3 +#define CONFIG_CMD_DTT + +/* I2C EEPROM (M24C64) */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS 5 /* 32 Bytes */ +#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS 20 +#define CONFIG_CMD_EEPROM + +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define TQMA6_PFUZE100_I2C_BUS 2 + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +/* Fuses */ +#define CONFIG_MXC_OCOTP +#define CONFIG_CMD_FUSE + +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET + +#define CONFIG_FEC_MXC +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_PHYLIB +#define CONFIG_MII + +#if defined(CONFIG_MBA6) + +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" + +#define CONFIG_FEC_MXC_PHYADDR 0x03 +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_KSZ9031 + +#else + +#error "define PHY to use for your baseboard" + +#endif + +#define CONFIG_ARP_TIMEOUT 200UL +/* Network config - Allow larger/faster download for TFTP/NFS */ +#define CONFIG_IP_DEFRAG +#define CONFIG_TFTP_BLOCKSIZE 4096 +#define CONFIG_NFS_READ_SIZE 4096 + +#if defined(CONFIG_MBA6) + +#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CONSOLE_DEV "ttymxc1" + +#else + +#error "define baseboard specific things (uart, number of SD-card slots)" + +#endif + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_ITEST +#define CONFIG_CMD_SETEXPR +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_LOADADDR 0x12000000 + +/* place code in last 4 MiB of RAM */ +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#define CONFIG_SYS_TEXT_BASE 0x2fc00000 +#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) +#define CONFIG_SYS_TEXT_BASE 0x4fc00000 +#endif + +#define CONFIG_ENV_SIZE (SZ_8K) +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M) + +#if defined(CONFIG_TQMA6X_MMC_BOOT) + +#define CONFIG_ENV_IS_IN_MMC +#define TQMA6_UBOOT_OFFSET SZ_1K +#define TQMA6_UBOOT_SECTOR_START 0x2 +#define TQMA6_UBOOT_SECTOR_COUNT 0x7fe + +#define CONFIG_ENV_OFFSET SZ_1M +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define TQMA6_FDT_OFFSET (2 * SZ_1M) +#define TQMA6_FDT_SECTOR_START 0x1000 +#define TQMA6_FDT_SECTOR_COUNT 0x800 + +#define TQMA6_KERNEL_SECTOR_START 0x2000 +#define TQMA6_KERNEL_SECTOR_COUNT 0x2000 + +#define TQMA6_EXTRA_BOOTDEV_ENV_SETTINGS \ + "uboot_start="__stringify(TQMA6_UBOOT_SECTOR_START)"\0" \ + "uboot_size="__stringify(TQMA6_UBOOT_SECTOR_COUNT)"\0" \ + "fdt_start="__stringify(TQMA6_FDT_SECTOR_START)"\0" \ + "fdt_size="__stringify(TQMA6_FDT_SECTOR_COUNT)"\0" \ + "kernel_start="__stringify(TQMA6_KERNEL_SECTOR_START)"\0" \ + "kernel_size="__stringify(TQMA6_KERNEL_SECTOR_COUNT)"\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "loadimage=mmc dev ${mmcdev}; " \ + "mmc read ${loadaddr} ${kernel_start} ${kernel_size};\0" \ + "loadfdt=mmc dev ${mmcdev}; " \ + "mmc read ${fdt_addr} ${fdt_start} ${fdt_size};\0" \ + "update_uboot=if tftp ${uboot}; then " \ + "if itest ${filesize} > 0; then " \ + "mmc dev ${mmcdev}; mmc rescan; " \ + "setexpr blkc ${filesize} / 0x200; " \ + "setexpr blkc ${blkc} + 1; " \ + "if itest ${blkc} <= ${uboot_size}; then " \ + "mmc write ${loadaddr} ${uboot_start} " \ + "${blkc}; " \ + "fi; " \ + "fi; fi; " \ + "setenv filesize; setenv blkc \0" \ + "update_kernel=run kernel_name; " \ + "if tftp ${kernel}; then " \ + "if itest ${filesize} > 0; then " \ + "mmc dev ${mmcdev}; mmc rescan; " \ + "setexpr blkc ${filesize} / 0x200; " \ + "setexpr blkc ${blkc} + 1; " \ + "if itest ${blkc} <= ${kernel_size}; then " \ + "mmc write ${loadaddr} " \ + "${kernel_start} ${blkc}; " \ + "fi; " \ + "fi; " \ + "fi; " \ + "setenv filesize; setenv blkc \0" \ + "update_fdt=if tftp ${fdt_file}; then " \ + "if itest ${filesize} > 0; then " \ + "mmc dev ${mmcdev}; mmc rescan; " \ + "setexpr blkc ${filesize} / 0x200; " \ + "setexpr blkc ${blkc} + 1; " \ + "if itest ${blkc} <= ${fdt_size}; then " \ + "mmc write ${loadaddr} ${fdt_start} ${blkc}; " \ + "fi; " \ + "fi; fi; " \ + "setenv filesize; setenv blkc \0" \ + +#define CONFIG_BOOTCOMMAND \ + "run mmcboot; run netboot; run panicboot" + +#elif defined(CONFIG_TQMA6X_SPI_BOOT) + +#define CONFIG_FLASH_SECTOR_SIZE 0x10000 + +#define TQMA6_UBOOT_OFFSET 0x400 +#define TQMA6_UBOOT_SECTOR_START 0x0 +/* max u-boot size: 512k */ +#define TQMA6_UBOOT_SECTOR_SIZE CONFIG_FLASH_SECTOR_SIZE +#define TQMA6_UBOOT_SECTOR_COUNT 0x8 +#define TQMA6_UBOOT_SIZE (TQMA6_UBOOT_SECTOR_SIZE * \ + TQMA6_UBOOT_SECTOR_COUNT) + +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_OFFSET (TQMA6_UBOOT_SIZE) +#define CONFIG_ENV_SECT_SIZE CONFIG_FLASH_SECTOR_SIZE +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SECT_SIZE) + +#define CONFIG_ENV_SPI_BUS (CONFIG_SF_DEFAULT_BUS) +#define CONFIG_ENV_SPI_CS (CONFIG_SF_DEFAULT_CS) +#define CONFIG_ENV_SPI_MAX_HZ (CONFIG_SF_DEFAULT_SPEED) +#define CONFIG_ENV_SPI_MODE (CONFIG_SF_DEFAULT_MODE) + +#define TQMA6_FDT_OFFSET (CONFIG_ENV_OFFSET_REDUND + \ + CONFIG_ENV_SECT_SIZE) +#define TQMA6_FDT_SECT_SIZE (CONFIG_FLASH_SECTOR_SIZE) + +#define TQMA6_FDT_SECTOR_START 0x0a /* 8 Sector u-boot, 2 Sector env */ +#define TQMA6_FDT_SECTOR_COUNT 0x01 + +#define TQMA6_KERNEL_SECTOR_START 0x10 +#define TQMA6_KERNEL_SECTOR_COUNT 0x60 + +#define TQMA6_EXTRA_BOOTDEV_ENV_SETTINGS \ + "mmcblkdev=0\0" \ + "uboot_offset="__stringify(TQMA6_UBOOT_OFFSET)"\0" \ + "uboot_sectors="__stringify(TQMA6_UBOOT_SECTOR_COUNT)"\0" \ + "fdt_start="__stringify(TQMA6_FDT_SECTOR_START)"\0" \ + "fdt_sectors="__stringify(TQMA6_FDT_SECTOR_COUNT)"\0" \ + "kernel_start="__stringify(TQMA6_KERNEL_SECTOR_START)"\0" \ + "kernel_sectors="__stringify(TQMA6_KERNEL_SECTOR_COUNT)"\0" \ + "update_uboot=if tftp ${uboot}; then " \ + "if itest ${filesize} > 0; then " \ + "setexpr blkc ${filesize} + " \ + __stringify(TQMA6_UBOOT_OFFSET) "; " \ + "setexpr size ${uboot_sectors} * " \ + __stringify(CONFIG_FLASH_SECTOR_SIZE)"; " \ + "if itest ${blkc} <= ${size}; then " \ + "sf probe; " \ + "sf erase 0 ${size}; " \ + "sf write ${loadaddr} ${uboot_offset} " \ + "${filesize}; " \ + "fi; " \ + "fi; fi; " \ + "setenv filesize 0; setenv blkc; setenv size \0" \ + "update_kernel=run kernel_name; if tftp ${kernel}; then " \ + "if itest ${filesize} > 0; then " \ + "setexpr size ${kernel_sectors} * " \ + __stringify(CONFIG_FLASH_SECTOR_SIZE)"; " \ + "setexpr offset ${kernel_start} * " \ + __stringify(CONFIG_FLASH_SECTOR_SIZE)"; " \ + "if itest ${filesize} <= ${size}; then " \ + "sf probe; " \ + "sf erase ${offset} ${size}; " \ + "sf write ${loadaddr} ${offset} " \ + "${filesize}; " \ + "fi; " \ + "fi; fi; " \ + "setenv filesize 0; setenv size ; setenv offset\0" \ + "update_fdt=if tftp ${fdt_file}; then " \ + "if itest ${filesize} > 0; then " \ + "setexpr size ${fdt_sectors} * " \ + __stringify(CONFIG_FLASH_SECTOR_SIZE)"; " \ + "setexpr offset ${fdt_start} * " \ + __stringify(CONFIG_FLASH_SECTOR_SIZE)"; " \ + "if itest ${filesize} <= ${size}; then " \ + "sf probe; " \ + "sf erase ${offset} ${size}; " \ + "sf write ${loadaddr} ${offset} " \ + "${filesize}; " \ + "fi; " \ + "fi; fi; " \ + "setenv filesize 0; setenv size ; setenv offset\0" \ + "loadimage=sf probe; " \ + "setexpr size ${kernel_sectors} * " \ + __stringify(CONFIG_FLASH_SECTOR_SIZE)"; " \ + "setexpr offset ${kernel_start} * " \ + __stringify(CONFIG_FLASH_SECTOR_SIZE)"; " \ + "sf read ${loadaddr} ${offset} ${size}; " \ + "setenv size ; setenv offset\0" \ + "loadfdt=sf probe; " \ + "setexpr size ${fdt_sectors} * " \ + __stringify(CONFIG_FLASH_SECTOR_SIZE)"; " \ + "setexpr offset ${fdt_start} * " \ + __stringify(CONFIG_FLASH_SECTOR_SIZE)"; " \ + "sf read ${${fdt_addr}} ${offset} ${size}; " \ + "setenv size ; setenv offset\0" \ + + +#define CONFIG_BOOTCOMMAND \ + "sf probe; run mmcboot; run netboot; run panicboot" \ + +#else + +#error "need to define boot source" + +#endif + +/* 128 MiB offset as in ARM related docu for linux suggested */ +#define TQMA6_FDT_ADDRESS 0x18000000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "board=tqma6\0" \ + "uimage=uImage\0" \ + "zimage=zImage\0" \ + "boot_type=bootz\0" \ + "kernel_name=if test \"${boot_type}\" != bootz; then " \ + "setenv kernel ${uimage}; " \ + "else setenv kernel ${zimage}; fi\0" \ + "uboot=u-boot.imx\0" \ + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdt_addr="__stringify(TQMA6_FDT_ADDRESS)"\0" \ + "console=" CONFIG_CONSOLE_DEV "\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "addtty=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \ + "addfb=setenv bootargs ${bootargs} " \ + "imx-fbdev.legacyfb_depth=32 consoleblank=0\0" \ + "mmcpart=2\0" \ + "mmcblkdev=0\0" \ + "mmcargs=run addmmc addtty addfb\0" \ + "addmmc=setenv bootargs ${bootargs} " \ + "root=/dev/mmcblk${mmcblkdev}p${mmcpart} rw rootwait\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "setenv bootargs; " \ + "run mmcargs; " \ + "run loadimage; " \ + "if run loadfdt; then " \ + "echo boot device tree kernel ...; " \ + "${boot_type} ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "${boot_type}; " \ + "fi;\0" \ + "setenv bootargs \0" \ + "netdev=eth0\0" \ + "rootpath=/srv/nfs/tqma6\0" \ + "ipmode=static\0" \ + "netargs=run addnfs addip addtty addfb\0" \ + "addnfs=setenv bootargs ${bootargs} " \ + "root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath},v3,tcp;\0" \ + "addip_static=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \ + "${hostname}:${netdev}:off\0" \ + "addip_dynamic=setenv bootargs ${bootargs} ip=dhcp\0" \ + "addip=if test \"${ipmode}\" != static; then " \ + "run addip_dynamic; else run addip_static; fi\0" \ + "set_getcmd=if test \"${ipmode}\" != static; then " \ + "setenv getcmd dhcp; setenv autoload yes; " \ + "else setenv getcmd tftp; setenv autoload no; fi\0" \ + "netboot=echo Booting from net ...; " \ + "run kernel_name; " \ + "run set_getcmd; " \ + "setenv bootargs; " \ + "run netargs; " \ + "if ${getcmd} ${kernel}; then " \ + "if ${getcmd} ${fdt_addr} ${fdt_file}; then " \ + "${boot_type} ${loadaddr} - ${fdt_addr}; " \ + "fi; " \ + "fi; " \ + "echo ... failed\0" \ + "panicboot=echo No boot device !!! reset\0" \ + TQMA6_EXTRA_BOOTDEV_ENV_SETTINGS \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 512 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_STACKSIZE (128u * SZ_1K) + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#endif /* __CONFIG_H */ |