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| author | Sandeep Singh <sandeep@freescale.com> | 2014-06-05 18:49:57 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-06-05 13:45:07 -0700 |
| commit | 377ffcfabff39d2f812c28e54152cb53839ce338 (patch) | |
| tree | 1d986733cb4cf0d37ed4bc43bc861e6dd5c8a0ed /include | |
| parent | fa6e742825f1e1e00ac69c6829e75f14a1a51e9f (diff) | |
| download | u-boot-imx-377ffcfabff39d2f812c28e54152cb53839ce338.zip u-boot-imx-377ffcfabff39d2f812c28e54152cb53839ce338.tar.gz u-boot-imx-377ffcfabff39d2f812c28e54152cb53839ce338.tar.bz2 | |
powerpc/mpc85xx: Add workaround to enable TDM on T1040
This is a workaround for 32 bit hardware limitation of TDM.
T1040 has 36 bit physical addressing, TDM DMAC register
are 32 bit wide but need to store address of CCSR space
which lies beyond 32 bit address range. This workaround
creats a LAW to enable access of TDM DMA to CCSR by
mapping CCSR to overlap with DDR.
A hole of 16M is created in memory using device tree. This
workaround law is set only if "tdm" is defined in hwconfig.
Also disable POST tests and add LIODN for TDM
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/T1040QDS.h | 6 | ||||
| -rw-r--r-- | include/configs/T104xRDB.h | 6 |
2 files changed, 12 insertions, 0 deletions
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 2215ac8..f2a75ae 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -201,6 +201,12 @@ unsigned long get_board_ddr_clk(void); CSPR_MSEL_NOR | \ CSPR_V) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) + +/* + * TDM Definition + */ +#define T1040_TDM_QUIRK_CCSR_BASE 0xfe000000 + /* NOR Flash Timing Params */ #define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index e564cb7..8d6c51b 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -230,6 +230,12 @@ CSPR_MSEL_NOR | \ CSPR_V) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) + +/* + * TDM Definition + */ +#define T1040_TDM_QUIRK_CCSR_BASE 0xfe000000 + /* NOR Flash Timing Params */ #define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ |