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authorWolfgang Denk <wd@denx.de>2007-05-28 01:11:11 +0200
committerWolfgang Denk <wd@denx.de>2007-05-28 01:11:11 +0200
commit19bf91f9628f80a55d4f171df71041574882b3d6 (patch)
tree14fd9ebacffd43564eaf014997baacea39abde2c /include
parent7d075ee1d8cfcab9dd5b356816f17d013498cc62 (diff)
parent7049288fb1f16f1b317140226cdebd07bd416395 (diff)
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Merge with /home/tur/git/u-boot#motionpro
Diffstat (limited to 'include')
-rw-r--r--include/configs/BC3450.h12
-rw-r--r--include/configs/IceCube.h4
-rw-r--r--include/configs/PM520.h2
-rw-r--r--include/configs/TB5200.h12
-rw-r--r--include/configs/TOP5200.h2
-rw-r--r--include/configs/TQM5200.h12
-rw-r--r--include/configs/Total5200.h2
-rw-r--r--include/configs/aev.h12
-rw-r--r--include/configs/canmb.h2
-rw-r--r--include/configs/cpci5200.h2
-rw-r--r--include/configs/hmi1001.h2
-rw-r--r--include/configs/inka4x0.h2
-rw-r--r--include/configs/mcc200.h2
-rw-r--r--include/configs/motionpro.h88
-rw-r--r--include/configs/o2dnt.h12
-rw-r--r--include/configs/pf5200.h2
-rw-r--r--include/configs/smmaco4.h12
-rw-r--r--include/configs/spieval.h12
-rw-r--r--include/configs/uc101.h2
-rw-r--r--include/configs/v38b.h2
-rw-r--r--include/status_led.h12
21 files changed, 132 insertions, 78 deletions
diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h
index 5b54f30..bc30977 100644
--- a/include/configs/BC3450.h
+++ b/include/configs/BC3450.h
@@ -282,17 +282,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet
- * hasn't been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#if defined(CFG_IPBSPEED_133)
-# define CFG_PCISPEED_66 /* define for 66MHz speed */
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
+# define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -488,7 +488,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
# define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
# define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index 5988112..73be069 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -167,9 +167,9 @@
* IPB Bus clocking configuration.
*/
#if defined(CONFIG_LITE5200B)
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#else
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
#endif /* CONFIG_MPC5200 */
diff --git a/include/configs/PM520.h b/include/configs/PM520.h
index 9c241e6..7d91a01 100644
--- a/include/configs/PM520.h
+++ b/include/configs/PM520.h
@@ -160,7 +160,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
* I2C configuration
diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h
index 8a6e5a6..b42cfb6 100644
--- a/include/configs/TB5200.h
+++ b/include/configs/TB5200.h
@@ -200,17 +200,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -432,7 +432,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h
index f41dbd0..1cc9ce9 100644
--- a/include/configs/TOP5200.h
+++ b/include/configs/TOP5200.h
@@ -186,7 +186,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 7069b35..7935593 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -269,17 +269,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133) && !defined(CONFIG_CAM5200)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
+ * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -594,7 +594,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/Total5200.h b/include/configs/Total5200.h
index 8175703..d8686dd 100644
--- a/include/configs/Total5200.h
+++ b/include/configs/Total5200.h
@@ -183,7 +183,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
diff --git a/include/configs/aev.h b/include/configs/aev.h
index 8d9f0a1..6c2a360 100644
--- a/include/configs/aev.h
+++ b/include/configs/aev.h
@@ -166,17 +166,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -362,7 +362,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/canmb.h b/include/configs/canmb.h
index 2c160a4..ec6d57e 100644
--- a/include/configs/canmb.h
+++ b/include/configs/canmb.h
@@ -111,7 +111,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* Flash configuration, expect one 16 Megabyte Bank at most
diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h
index f9586fb..f5efcd9 100644
--- a/include/configs/cpci5200.h
+++ b/include/configs/cpci5200.h
@@ -179,7 +179,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
* I2C configuration
diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h
index 095b5f6..4d813d8 100644
--- a/include/configs/hmi1001.h
+++ b/include/configs/hmi1001.h
@@ -110,7 +110,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h
index 773d5d2..ad3cf06 100644
--- a/include/configs/inka4x0.h
+++ b/include/configs/inka4x0.h
@@ -147,7 +147,7 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* Flash configuration
diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h
index 621a81c..c2324a0 100644
--- a/include/configs/mcc200.h
+++ b/include/configs/mcc200.h
@@ -169,7 +169,7 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h
index e6e0eb1..e3899a5 100644
--- a/include/configs/motionpro.h
+++ b/include/configs/motionpro.h
@@ -54,7 +54,8 @@
CFG_CMD_JFFS2 | \
CFG_CMD_I2C | \
CFG_CMD_DATE | \
- CFG_CMD_EEPROM)
+ CFG_CMD_EEPROM | \
+ CFG_CMD_DTT)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
@@ -75,7 +76,7 @@
#define CONFIG_MPC5xxx_FEC 1
#define CONFIG_PHY_ADDR 0x2
#define CONFIG_PHY_TYPE 0x79c874
-
+#define CONFIG_RESET_PHY_R 1
/*
* Autobooting
@@ -116,26 +117,27 @@
"fdt_file=/tftpboot/motionpro/motionpro.dtb\0" \
"ramdisk_file=/tftpboot/motionpro/uRamdisk\0" \
"multi_image_file=kernel+initrd+dtb.img\0" \
- "load=tftp $(u-boot_addr) $(u-boot)\0" \
+ "load=tftp ${u-boot_addr} ${u-boot}\0" \
"update=prot off fff00000 fff3ffff; era fff00000 fff3ffff; " \
- "cp.b $(u-boot_addr) fff00000 $(filesize);" \
+ "cp.b ${u-boot_addr} fff00000 ${filesize};" \
"prot on fff00000 fff3ffff\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$(serverip):$(rootpath)\0" \
+ "nfsroot=${serverip}:${rootpath}\0" \
"fat_args=setenv bootargs rw\0" \
- "addip=setenv bootargs $(bootargs) " \
- "ip=$(ipaddr):$(serverip):$(gatewayip):" \
- "$(netmask):$(hostname):$(netdev):off panic=1 " \
- "console=$(console)\0" \
- "net_nfs=tftp $(kernel_addr) $(bootfile); " \
- "tftp $(fdt_addr) $(fdt_file); run nfsargs addip; " \
- "bootm $(kernel_addr) - $(fdt_addr)\0" \
- "net_self=tftp $(kernel_addr) $(bootfile); " \
- "tftp $(fdt_addr) $(fdt_file); " \
- "tftp $(ramdisk_addr) $(ramdisk_file); " \
+ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:" \
+ "${netmask}:${hostname}:${netdev}:off panic=1 " \
+ "console=${console}\0" \
+ "net_nfs=tftp ${kernel_addr} ${bootfile}; " \
+ "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip; " \
+ "bootm ${kernel_addr} - ${fdt_addr}\0" \
+ "net_self=tftp ${kernel_addr} ${bootfile}; " \
+ "tftp ${fdt_addr} ${fdt_file}; " \
+ "tftp ${ramdisk_addr} ${ramdisk_file}; " \
"run ramargs addip; " \
- "bootm $(kernel_addr) $(ramdisk_addr) $(fdt_addr)\0" \
+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
"fat_multi=run fat_args addip; fatload ide 0:1 " \
"${multi_image_addr} ${multi_image_file}; " \
"bootm ${multi_image_addr}\0" \
@@ -160,9 +162,9 @@
/*
- * Set IPB speed to 100MHz (yes, the #define is misnamed)
+ * Set IPB speed to 100MHz
*/
-#define CFG_IPBSPEED_133
+#define CFG_IPBCLK_EQUALS_XLBCLK
/*
@@ -268,7 +270,8 @@
#define MTDIDS_DEFAULT "nor0=motionpro-0"
#define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \
"13m(fs),2m(kernel),256k(uboot)," \
- "64k(env),64k(dtb),-(user_data)"
+ "64k(env),64k(redund_env),64k(dtb)," \
+ "-(user_data)"
/*
* IDE/ATA configuration
@@ -297,8 +300,9 @@
* EEPROM configuration
*/
#define CFG_I2C_EEPROM_ADDR_LEN 1
-#define CFG_EEPROM_PAGE_WRITE_BITS 3
-#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70
+#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* DTT driver needs this */
+#define CFG_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
#define CFG_I2C_MULTI_EEPROMS 1 /* 2 EEPROMs (addr:50,52) */
@@ -310,6 +314,35 @@
/*
+ * Status LED configuration
+ */
+#define CONFIG_STATUS_LED /* Status LED enabled */
+#define CONFIG_BOARD_SPECIFIC_LED
+
+#define ENABLE_GPIO_OUT 0x00000024
+#define LED_ON 0x00000010
+
+#ifndef __ASSEMBLY__
+/*
+ * In case of Motion-PRO, a LED is identified by its corresponding
+ * GPT Enable and Mode Select Register.
+ */
+typedef volatile unsigned long * led_id_t;
+
+extern void __led_init(led_id_t id, int state);
+extern void __led_toggle(led_id_t id);
+extern void __led_set(led_id_t id, int state);
+#endif /* __ASSEMBLY__ */
+
+
+/*
+ * Temperature sensor
+ */
+#define CONFIG_DTT_LM75 1
+#define CONFIG_DTT_SENSORS { 0x49 }
+
+
+/*
* Environment settings
*/
#define CFG_ENV_IS_IN_FLASH 1
@@ -318,6 +351,9 @@
#define CFG_ENV_SIZE 0x1000
#define CFG_ENV_SECT_SIZE 0x10000
+/* Configuration of redundant environment */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
/*
* Pin multiplexing configuration
@@ -335,11 +371,17 @@
/*
+ * Motion-PRO's CPLD revision control register
+ */
+#define CPLD_REV_REGISTER (CFG_CS2_START + 0x06)
+
+
+/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
@@ -376,6 +418,6 @@
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
-#define OF_STDOUT_PAT "/soc5200@f0000000/serial@2000"
+#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
#endif /* __CONFIG_H */
diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h
index 5c05a74..63d0da7 100644
--- a/include/configs/o2dnt.h
+++ b/include/configs/o2dnt.h
@@ -137,17 +137,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
#endif
@@ -276,7 +276,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
/*
* For 66 MHz PCI clock additional Wait State is needed for CS0 (flash).
*/
diff --git a/include/configs/pf5200.h b/include/configs/pf5200.h
index fefdb3c..7151a9e 100644
--- a/include/configs/pf5200.h
+++ b/include/configs/pf5200.h
@@ -171,7 +171,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
* I2C configuration
diff --git a/include/configs/smmaco4.h b/include/configs/smmaco4.h
index e106b3b..185c2d4 100644
--- a/include/configs/smmaco4.h
+++ b/include/configs/smmaco4.h
@@ -138,17 +138,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -357,7 +357,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/spieval.h b/include/configs/spieval.h
index f40dde2..fd138a5 100644
--- a/include/configs/spieval.h
+++ b/include/configs/spieval.h
@@ -219,17 +219,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -444,7 +444,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/uc101.h b/include/configs/uc101.h
index 8cd8e9b..ff061ee 100644
--- a/include/configs/uc101.h
+++ b/include/configs/uc101.h
@@ -114,7 +114,7 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
diff --git a/include/configs/v38b.h b/include/configs/v38b.h
index e19591d..0b7b19e 100644
--- a/include/configs/v38b.h
+++ b/include/configs/v38b.h
@@ -167,7 +167,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
diff --git a/include/status_led.h b/include/status_led.h
index db4c60f..71a202f 100644
--- a/include/status_led.h
+++ b/include/status_led.h
@@ -355,6 +355,18 @@ void status_led_set (int led, int state);
# define STATUS_LED_ACTIVE 0 /* LED on for bit == 0 */
# define STATUS_LED_BOOT 0 /* LED 0 used for boot status */
+#elif defined(CONFIG_MOTIONPRO)
+
+#define STATUS_LED_BIT ((vu_long *) MPC5XXX_GPT6_ENABLE)
+#define STATUS_LED_PERIOD (CFG_HZ / 10)
+#define STATUS_LED_STATE STATUS_LED_BLINKING
+
+#define STATUS_LED_BIT1 ((vu_long *) MPC5XXX_GPT7_ENABLE)
+#define STATUS_LED_PERIOD1 (CFG_HZ / 10)
+#define STATUS_LED_STATE1 STATUS_LED_OFF
+
+#define STATUS_LED_BOOT 0 /* LED 0 used for boot status */
+
#else
# error Status LED configuration missing
#endif