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| author | Stefan Roese <sr@denx.de> | 2005-11-07 09:57:57 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2005-11-07 09:57:57 +0100 |
| commit | 182e10691f378987b53c64ee0347d542e4924ef6 (patch) | |
| tree | 98d3fcb276f86f1dafd28ae9fa8b120552cd4d67 /include | |
| parent | f190c11b1f22ff766e046588e5a7bb55f28ae305 (diff) | |
| download | u-boot-imx-182e10691f378987b53c64ee0347d542e4924ef6.zip u-boot-imx-182e10691f378987b53c64ee0347d542e4924ef6.tar.gz u-boot-imx-182e10691f378987b53c64ee0347d542e4924ef6.tar.bz2 | |
Correct PPC Timebase register definitions (SPRN_TBRL...)
Patch by Stefan Roese, 07 Nov 2005
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-ppc/processor.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 551da35..0b30d2d 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -310,10 +310,10 @@ #define SPRN_TBHU 0x3CC /* Time Base High User-mode */ #define SPRN_TBLO 0x3DD /* Time Base Low */ #define SPRN_TBLU 0x3CD /* Time Base Low User-mode */ -#define SPRN_TBRL 0x10D /* Time Base Read Lower Register */ -#define SPRN_TBRU 0x10C /* Time Base Read Upper Register */ -#define SPRN_TBWL 0x11D /* Time Base Write Lower Register */ -#define SPRN_TBWU 0x11C /* Time Base Write Upper Register */ +#define SPRN_TBRL 0x10C /* Time Base Read Lower Register */ +#define SPRN_TBRU 0x10D /* Time Base Read Upper Register */ +#define SPRN_TBWL 0x11C /* Time Base Write Lower Register */ +#define SPRN_TBWU 0x11D /* Time Base Write Upper Register */ #ifndef CONFIG_BOOKE #define SPRN_TCR 0x3DA /* Timer Control Register */ #else |