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| author | Michael Pratt <mpratt@chromium.org> | 2014-06-18 17:54:02 +0530 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2014-06-23 08:45:45 +0900 |
| commit | 0cf7e18904f245d0ba7a5ed85ed48bea386258d4 (patch) | |
| tree | 1d0b18c8128e3d6c74be9b5b0341b1055962e471 /include | |
| parent | 582693b273b43ec0ca6694d61456ba0a0b9739a9 (diff) | |
| download | u-boot-imx-0cf7e18904f245d0ba7a5ed85ed48bea386258d4.zip u-boot-imx-0cf7e18904f245d0ba7a5ed85ed48bea386258d4.tar.gz u-boot-imx-0cf7e18904f245d0ba7a5ed85ed48bea386258d4.tar.bz2 | |
Exynos: Split 5250 and 5420 memory bank configuration
Since snow has a different memory configuration than peach, split the
configuration between the 5250 and 5420. Exynos 5420 supports runtime
memory configuration detection, and can make the determination between 4
and 7 banks at runtime.
Include the bank size with the number of banks for context to make the
number of banks meaningful.
Signed-off-by: Michael Pratt <mpratt@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/exynos5-dt.h | 2 | ||||
| -rw-r--r-- | include/configs/exynos5250-dt.h | 5 | ||||
| -rw-r--r-- | include/configs/exynos5420.h | 4 |
3 files changed, 9 insertions, 2 deletions
diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h index 3c51650..e36a031 100644 --- a/include/configs/exynos5-dt.h +++ b/include/configs/exynos5-dt.h @@ -161,8 +161,6 @@ #define CONFIG_RD_LVL -#define CONFIG_NR_DRAM_BANKS 8 -#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 3982010..74e72a5 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -65,4 +65,9 @@ #define LCD_YRES 1600 #define LCD_BPP LCD_COLOR16 #endif + +/* DRAM Memory Banks */ +#define CONFIG_NR_DRAM_BANKS 8 +#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ + #endif /* __CONFIG_5250_H */ diff --git a/include/configs/exynos5420.h b/include/configs/exynos5420.h index 2ffe5ee..d2a9556 100644 --- a/include/configs/exynos5420.h +++ b/include/configs/exynos5420.h @@ -45,4 +45,8 @@ */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) +/* DRAM Memory Banks */ +#define CONFIG_NR_DRAM_BANKS 7 +#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ + #endif /* __CONFIG_EXYNOS5420_H */ |