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authorPrabhakar Kushwaha <prabhakar@freescale.com>2014-06-12 12:14:00 +0530
committerYork Sun <yorksun@freescale.com>2014-07-22 16:25:54 -0700
commit04818bbdc34cb02b2590af8e5f77118ed8a8d755 (patch)
treef8e51caef6aac425789ff8e18b49003c462f5b3c /include
parent3bab3d8324874604501ff9154e68732fb986057a (diff)
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driver/nand: Update SRAM initialize logic for IFC.
IFC controller v1.1.0 requires internal SRAM initialize by reading NAND flash. Higher controller versions have provided "SRAM init" bit in NCFGR register space. update SRAM initialize logic to reflect the same. Also print error message in case of Page read error. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/fsl_ifc.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index 630e4b4..b353b04 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -367,6 +367,8 @@
*/
/* Auto Boot Mode */
#define IFC_NAND_NCFGR_BOOT 0x80000000
+/* SRAM INIT EN */
+#define IFC_NAND_SRAM_INIT_EN 0x20000000
/* Addressing Mode-ROW0+n/COL0 */
#define IFC_NAND_NCFGR_ADDR_MODE_RC0 0x00000000
/* Addressing Mode-ROW0+n/COL0+n */