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authorAnton Vorontsov <avorontsov@ru.mvista.com>2008-10-02 18:31:59 +0400
committerKim Phillips <kim.phillips@freescale.com>2008-10-21 18:34:05 -0500
commite6d9c8916de9c24f2c52d0b01cf00d2e74a04cd8 (patch)
tree4d2920fde1cdfeded471f0defa950471026e5671 /include
parent6f9cc6608b4e1cefde56c0fb99ae1c95c42575ff (diff)
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mpc83xx: add TSECs' HRCWH masks for MPC837x processors
We'll use these masks to parse TSEC modes out of HRCWH. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/mpc83xx.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 7f30d683..ccf1077 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -544,12 +544,14 @@
#define HRCWH_RL_EXT_LEGACY 0x00000000
#define HRCWH_RL_EXT_NAND 0x00040000
+#define HRCWH_TSEC1M_MASK 0x0000E000
#define HRCWH_TSEC1M_IN_MII 0x00000000
#define HRCWH_TSEC1M_IN_RMII 0x00002000
#define HRCWH_TSEC1M_IN_RGMII 0x00006000
#define HRCWH_TSEC1M_IN_RTBI 0x0000A000
#define HRCWH_TSEC1M_IN_SGMII 0x0000C000
+#define HRCWH_TSEC2M_MASK 0x00001C00
#define HRCWH_TSEC2M_IN_MII 0x00000000
#define HRCWH_TSEC2M_IN_RMII 0x00000400
#define HRCWH_TSEC2M_IN_RGMII 0x00000C00