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| author | Michal Simek <michal.simek@xilinx.com> | 2013-04-22 15:43:02 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2013-05-06 10:41:24 +0200 |
| commit | d5dae85f23c7c902731512e451afde9a6e4a250a (patch) | |
| tree | 8b7230045d9b0c43400e2ed661fb9282c662472c /include/xilinx.h | |
| parent | 5bd0bd7cef396a830996b4ad91b89b7d205c7298 (diff) | |
| download | u-boot-imx-d5dae85f23c7c902731512e451afde9a6e4a250a.zip u-boot-imx-d5dae85f23c7c902731512e451afde9a6e4a250a.tar.gz u-boot-imx-d5dae85f23c7c902731512e451afde9a6e4a250a.tar.bz2 | |
fpga: zynq: Add support for loading bitstream
Devcfg device requires to load bitstream in binary format.
But u-boot also has an option for loading bitstream in bit
format. Let's handle both cases by zynqpl driver.
Also add suport for loading partial bitstreams.
The first driver version was done by:
Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'include/xilinx.h')
| -rw-r--r-- | include/xilinx.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/xilinx.h b/include/xilinx.h index 5f25b7a..592cbea 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -33,10 +33,12 @@ #define CONFIG_SYS_VIRTEX_E CONFIG_SYS_FPGA_DEV( 0x2 ) #define CONFIG_SYS_VIRTEX2 CONFIG_SYS_FPGA_DEV( 0x4 ) #define CONFIG_SYS_SPARTAN3 CONFIG_SYS_FPGA_DEV( 0x8 ) +#define CONFIG_SYS_ZYNQ CONFIG_SYS_FPGA_DEV(0x10) #define CONFIG_SYS_XILINX_SPARTAN2 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN2) #define CONFIG_SYS_XILINX_VIRTEX_E (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX_E) #define CONFIG_SYS_XILINX_VIRTEX2 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX2) #define CONFIG_SYS_XILINX_SPARTAN3 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN3) +#define CONFIG_SYS_XILINX_ZYNQ (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_ZYNQ) /* XXX - Add new models here */ @@ -59,6 +61,7 @@ typedef enum { /* typedef Xilinx_iface */ jtag_mode, /* jtag/tap serial (not used ) */ master_selectmap, /* master SelectMap (virtex2) */ slave_selectmap, /* slave SelectMap (virtex2) */ + devcfg, /* devcfg interface (zynq) */ max_xilinx_iface_type /* insert all new types before this */ } Xilinx_iface; /* end, typedef Xilinx_iface */ @@ -68,6 +71,7 @@ typedef enum { /* typedef Xilinx_Family */ Xilinx_VirtexE, /* Virtex-E Family */ Xilinx_Virtex2, /* Virtex2 Family */ Xilinx_Spartan3, /* Spartan-III Family */ + xilinx_zynq, /* Zynq Family */ max_xilinx_type /* insert all new types before this */ } Xilinx_Family; /* end, typedef Xilinx_Family */ |