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author | Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com> | 2013-05-21 15:01:36 +0530 |
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committer | Andy Fleming <afleming@freescale.com> | 2013-06-13 16:44:49 -0500 |
commit | 1695b29a5daa1f792e62f4c637284c8c05ea577b (patch) | |
tree | 7e4ccd905d1269ef986ab81ac78b046e15984ebd /include/synopsys | |
parent | 5707df7796f3d2791bdfaa29e682b1d3cc33f90e (diff) | |
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mmc: sdhci: Enable 8-bit bus width only for 3.0 spec onwards
CAP register don't have any information for 8-bit buswidth support
on 2.0 sdhci spec, only from 3.0 onwards bit[18] got this information.
Due to this misassignment in sdhci, mmc is setting 8-bit buswidth using
mmc_set_bus_width even if controller doesn't support.
Below change has code information.
"mmc: Properly determine maximum supported bus width"
(sha1: 7798f6dbd5e1a3030ed81a81da5dfb57c3307cac)
Bug log: <mmc plus and emmc cards)
-------
zynq-uboot> mmcinfo
Error detected in status(0x208100)!
Device: zynq_sdhci
Manufacturer ID: fe
.....
So enable 8-bit support only for 3.0 spec using CAP and for below 3.0
assign mmc->host_caps = MMC_MODE_8BIT on respective platform driver
if host have a support.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/synopsys')
0 files changed, 0 insertions, 0 deletions