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authorXiubo Li <Li.Xiubo@freescale.com>2014-11-21 17:40:59 +0800
committerYork Sun <yorksun@freescale.com>2014-12-11 09:42:22 -0800
commit660673af4fd10c544ceeedeb524ba92c27dbc586 (patch)
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parente87f3b308c454f6e78b02da857936c7d012c385b (diff)
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ARM: ls102xa: Setting device's stream id for SMMUs.
LS1 has 4 SMMUs for address translation of the masters. All the SMMUs' stream IDs are 8-bit. The address translation depends on the stream ID of the incoming transaction. Each master has unique stream ID assigned to it and is configurable through SCFG registers. The stream ID for the masters is identical and share the same register field of STREAM ID registers. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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