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authorXu Jiucheng <B37781@freescale.com>2013-03-25 07:30:13 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-02 16:57:34 -0500
commit545c12cf9ad16611f3055a097a360bcfab2e6106 (patch)
treedbbff93ea2b77a5d118350e7be7fbe9efa5ee521 /include/sound.h
parent1f06c9af31a274c8fd1263045d10b5a782fe8e45 (diff)
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powerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PC
When P1021RDB-PC reboot system, the board will hung at uboot DDR configuration. For P1021RDB-PC DDR reset pin is multiplex with QE, so uboot will reserve this pin for QE and skip DDR reset. Other platforms without QE will do this reset. This patch adds a slight code to reset DDR chip by QE CE_PB8 pin for NAND and NOR FLASH boot. For booting from SPI FALSH and SD card, it seems possible to use the rom on chip to write to the GPIO pins before configuring the DDR. Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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