diff options
| author | Richard Zhu <r65037@freescale.com> | 2014-06-24 09:59:47 +0800 |
|---|---|---|
| committer | Richard Zhu <r65037@freescale.com> | 2014-06-24 09:50:42 +0800 |
| commit | 5cc825b12c6b86a22f1a6a0535b52cf3ee142e77 (patch) | |
| tree | 8787315cffd0126bc94f25452cffbb897886d108 /include/sha1.h | |
| parent | 0658ad78e5059e3cbe3c3b43d3b33b9400167a2e (diff) | |
| download | u-boot-imx-5cc825b12c6b86a22f1a6a0535b52cf3ee142e77.zip u-boot-imx-5cc825b12c6b86a22f1a6a0535b52cf3ee142e77.tar.gz u-boot-imx-5cc825b12c6b86a22f1a6a0535b52cf3ee142e77.tar.bz2 | |
ENGR00319415 pcie: random link down issue after warm-rst
There are about 0.02% percentage on some imx6q/dl/solo
hw boards, random pcie link down when warm-reset is used.
Make sure to clear the ref_ssp_en bit16 of gpr1 before
warm-rst, and set ref_ssp_en after the pcie clks are
stable to workaround it.
rootcause:
* gpr regisers wouldn't be reset by warm-rst, while the
ref_ssp_en is required to be reset by pcie.
(work-around in u-boot)
* ref_ssp_en should be set after pcie clks are stable.
(work-around in kernel)
Signed-off-by: Richard Zhu <r65037@freescale.com>
Diffstat (limited to 'include/sha1.h')
0 files changed, 0 insertions, 0 deletions