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authorkevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>2009-10-10 13:32:01 +0900
committerTom Rix <Tom.Rix@windriver.com>2009-10-13 21:13:56 -0500
commit8250d0bae84229abea397f6b474b3556b0f04e80 (patch)
tree79643f34a17e1935eb5b4d5a0c999c43f469cb6d /include/s3c24x0.h
parentd67cce2dda3a40c3bd90a6c6e129fbb26dd4cfab (diff)
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Clean-up of s3c24x0 header files
This patch re-formats the arm920t s3c24x0 header files in preparation for changes to add support for the Embest SBC2440-II Board. The changes are as follows: - re-indent the code using Lindent - make sure register layouts are defined using a C struct - replace the upper-case typedef'ed C struct names with lower case non-typedef'ed ones - make sure registers are accessed using the proper accessor functions - run checkpatch.pl and fix any error reports It assumes the following patch has been applied first: - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009 - patch 1/4 of this series Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400, smdk2410 and trab configs to use the mtd nand driver (which isn't used by any board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or errors were found. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include/s3c24x0.h')
-rw-r--r--include/s3c24x0.h605
1 files changed, 60 insertions, 545 deletions
diff --git a/include/s3c24x0.h b/include/s3c24x0.h
index 4fa8000..56a551a 100644
--- a/include/s3c24x0.h
+++ b/include/s3c24x0.h
@@ -36,18 +36,18 @@ typedef volatile u16 S3C24X0_REG16;
typedef volatile u32 S3C24X0_REG32;
/* Memory controller (see manual chapter 5) */
-typedef struct {
+struct s3c24x0_memctl {
S3C24X0_REG32 BWSCON;
S3C24X0_REG32 BANKCON[8];
S3C24X0_REG32 REFRESH;
S3C24X0_REG32 BANKSIZE;
S3C24X0_REG32 MRSRB6;
S3C24X0_REG32 MRSRB7;
-} /*__attribute__((__packed__))*/ S3C24X0_MEMCTL;
+};
/* USB HOST (see manual chapter 12) */
-typedef struct {
+struct s3c24x0_usb_host {
S3C24X0_REG32 HcRevision;
S3C24X0_REG32 HcControl;
S3C24X0_REG32 HcCommonStatus;
@@ -71,11 +71,11 @@ typedef struct {
S3C24X0_REG32 HcRhStatus;
S3C24X0_REG32 HcRhPortStatus1;
S3C24X0_REG32 HcRhPortStatus2;
-} /*__attribute__((__packed__))*/ S3C24X0_USB_HOST;
+};
/* INTERRUPT (see manual chapter 14) */
-typedef struct {
+struct s3c24x0_interrupt {
S3C24X0_REG32 SRCPND;
S3C24X0_REG32 INTMOD;
S3C24X0_REG32 INTMSK;
@@ -86,11 +86,11 @@ typedef struct {
S3C24X0_REG32 SUBSRCPND;
S3C24X0_REG32 INTSUBMSK;
#endif
-} /*__attribute__((__packed__))*/ S3C24X0_INTERRUPT;
+};
/* DMAS (see manual chapter 8) */
-typedef struct {
+struct s3c24x0_dma {
S3C24X0_REG32 DISRC;
#ifdef CONFIG_S3C2410
S3C24X0_REG32 DISRCC;
@@ -110,27 +110,27 @@ typedef struct {
#ifdef CONFIG_S3C2410
S3C24X0_REG32 res[7];
#endif
-} /*__attribute__((__packed__))*/ S3C24X0_DMA;
+};
-typedef struct {
- S3C24X0_DMA dma[4];
-} /*__attribute__((__packed__))*/ S3C24X0_DMAS;
+struct s3c24x0_dmas {
+ struct s3c24x0_dma dma[4];
+};
/* CLOCK & POWER MANAGEMENT (see S3C2400 manual chapter 6) */
/* (see S3C2410 manual chapter 7) */
-typedef struct {
+struct s3c24x0_clock_power {
S3C24X0_REG32 LOCKTIME;
S3C24X0_REG32 MPLLCON;
S3C24X0_REG32 UPLLCON;
S3C24X0_REG32 CLKCON;
S3C24X0_REG32 CLKSLOW;
S3C24X0_REG32 CLKDIVN;
-} /*__attribute__((__packed__))*/ S3C24X0_CLOCK_POWER;
+};
/* LCD CONTROLLER (see manual chapter 15) */
-typedef struct {
+struct s3c24x0_lcd {
S3C24X0_REG32 LCDCON1;
S3C24X0_REG32 LCDCON2;
S3C24X0_REG32 LCDCON3;
@@ -151,22 +151,22 @@ typedef struct {
S3C24X0_REG32 LCDINTMSK;
S3C24X0_REG32 LPCSEL;
#endif
-} /*__attribute__((__packed__))*/ S3C24X0_LCD;
+};
/* NAND FLASH (see S3C2410 manual chapter 6) */
-typedef struct {
+struct s3c2410_nand {
S3C24X0_REG32 NFCONF;
S3C24X0_REG32 NFCMD;
S3C24X0_REG32 NFADDR;
S3C24X0_REG32 NFDATA;
S3C24X0_REG32 NFSTAT;
S3C24X0_REG32 NFECC;
-} /*__attribute__((__packed__))*/ S3C2410_NAND;
+};
/* UART (see manual chapter 11) */
-typedef struct {
+struct s3c24x0_uart {
S3C24X0_REG32 ULCON;
S3C24X0_REG32 UCON;
S3C24X0_REG32 UFCON;
@@ -187,28 +187,28 @@ typedef struct {
S3C24X0_REG8 res2[3];
#endif
S3C24X0_REG32 UBRDIV;
-} /*__attribute__((__packed__))*/ S3C24X0_UART;
+};
/* PWM TIMER (see manual chapter 10) */
-typedef struct {
+struct s3c24x0_timer {
S3C24X0_REG32 TCNTB;
S3C24X0_REG32 TCMPB;
S3C24X0_REG32 TCNTO;
-} /*__attribute__((__packed__))*/ S3C24X0_TIMER;
+};
-typedef struct {
- S3C24X0_REG32 TCFG0;
- S3C24X0_REG32 TCFG1;
- S3C24X0_REG32 TCON;
- S3C24X0_TIMER ch[4];
- S3C24X0_REG32 TCNTB4;
- S3C24X0_REG32 TCNTO4;
-} /*__attribute__((__packed__))*/ S3C24X0_TIMERS;
+struct s3c24x0_timers {
+ S3C24X0_REG32 TCFG0;
+ S3C24X0_REG32 TCFG1;
+ S3C24X0_REG32 TCON;
+ struct s3c24x0_timer ch[4];
+ S3C24X0_REG32 TCNTB4;
+ S3C24X0_REG32 TCNTO4;
+};
/* USB DEVICE (see manual chapter 13) */
-typedef struct {
+struct s3c24x0_usb_dev_fifos {
#ifdef __BIG_ENDIAN
S3C24X0_REG8 res[3];
S3C24X0_REG8 EP_FIFO_REG;
@@ -216,9 +216,9 @@ typedef struct {
S3C24X0_REG8 EP_FIFO_REG;
S3C24X0_REG8 res[3];
#endif
-} /*__attribute__((__packed__))*/ S3C24X0_USB_DEV_FIFOS;
+};
-typedef struct {
+struct s3c24x0_usb_dev_dmas {
#ifdef __BIG_ENDIAN
S3C24X0_REG8 res1[3];
S3C24X0_REG8 EP_DMA_CON;
@@ -246,9 +246,9 @@ typedef struct {
S3C24X0_REG8 EP_DMA_TTC_H;
S3C24X0_REG8 res6[3];
#endif
-} /*__attribute__((__packed__))*/ S3C24X0_USB_DEV_DMAS;
+};
-typedef struct {
+struct s3c24x0_usb_device {
#ifdef __BIG_ENDIAN
S3C24X0_REG8 res1[3];
S3C24X0_REG8 FUNC_ADDR_REG;
@@ -316,30 +316,30 @@ typedef struct {
S3C24X0_REG8 OUT_FIFO_CNT2_REG;
S3C24X0_REG8 res16[3];
#endif /* __BIG_ENDIAN */
- S3C24X0_USB_DEV_FIFOS fifo[5];
- S3C24X0_USB_DEV_DMAS dma[5];
-} /*__attribute__((__packed__))*/ S3C24X0_USB_DEVICE;
+ struct s3c24x0_usb_dev_fifos fifo[5];
+ struct s3c24x0_usb_dev_dmas dma[5];
+};
/* WATCH DOG TIMER (see manual chapter 18) */
-typedef struct {
+struct s3c24x0_watchdog {
S3C24X0_REG32 WTCON;
S3C24X0_REG32 WTDAT;
S3C24X0_REG32 WTCNT;
-} /*__attribute__((__packed__))*/ S3C24X0_WATCHDOG;
+};
/* IIC (see manual chapter 20) */
-typedef struct {
+struct s3c24x0_i2c {
S3C24X0_REG32 IICCON;
S3C24X0_REG32 IICSTAT;
S3C24X0_REG32 IICADD;
S3C24X0_REG32 IICDS;
-} /*__attribute__((__packed__))*/ S3C24X0_I2C;
+};
/* IIS (see manual chapter 21) */
-typedef struct {
+struct s3c24x0_i2s {
#ifdef __BIG_ENDIAN
S3C24X0_REG16 res1;
S3C24X0_REG16 IISCON;
@@ -363,11 +363,11 @@ typedef struct {
S3C24X0_REG16 IISFIFO;
S3C24X0_REG16 res5;
#endif
-} /*__attribute__((__packed__))*/ S3C24X0_I2S;
+};
/* I/O PORT (see manual chapter 9) */
-typedef struct {
+struct s3c24x0_gpio {
#ifdef CONFIG_S3C2400
S3C24X0_REG32 PACON;
S3C24X0_REG32 PADAT;
@@ -451,11 +451,11 @@ typedef struct {
S3C24X0_REG32 GSTATUS3;
S3C24X0_REG32 GSTATUS4;
#endif
-} /*__attribute__((__packed__))*/ S3C24X0_GPIO;
+};
/* RTC (see manual chapter 17) */
-typedef struct {
+struct s3c24x0_rtc {
#ifdef __BIG_ENDIAN
S3C24X0_REG8 res1[67];
S3C24X0_REG8 RTCCON;
@@ -528,28 +528,28 @@ typedef struct {
S3C24X0_REG8 BCDYEAR;
S3C24X0_REG8 res17[3];
#endif
-} /*__attribute__((__packed__))*/ S3C24X0_RTC;
+};
/* ADC (see manual chapter 16) */
-typedef struct {
+struct s3c2400_adc {
S3C24X0_REG32 ADCCON;
S3C24X0_REG32 ADCDAT;
-} /*__attribute__((__packed__))*/ S3C2400_ADC;
+};
/* ADC (see manual chapter 16) */
-typedef struct {
+struct s3c2410_adc {
S3C24X0_REG32 ADCCON;
S3C24X0_REG32 ADCTSC;
S3C24X0_REG32 ADCDLY;
S3C24X0_REG32 ADCDAT0;
S3C24X0_REG32 ADCDAT1;
-} /*__attribute__((__packed__))*/ S3C2410_ADC;
+};
/* SPI (see manual chapter 22) */
-typedef struct {
+struct s3c24x0_spi_channel {
S3C24X0_REG8 SPCON;
S3C24X0_REG8 res1[3];
S3C24X0_REG8 SPSTA;
@@ -563,15 +563,15 @@ typedef struct {
S3C24X0_REG8 SPRDAT;
S3C24X0_REG8 res6[3];
S3C24X0_REG8 res7[16];
-} /*__attribute__((__packed__))*/ S3C24X0_SPI_CHANNEL;
+};
-typedef struct {
- S3C24X0_SPI_CHANNEL ch[S3C24X0_SPI_CHANNELS];
-} /*__attribute__((__packed__))*/ S3C24X0_SPI;
+struct s3c24x0_spi {
+ struct s3c24x0_spi_channel ch[S3C24X0_SPI_CHANNELS];
+};
/* MMC INTERFACE (see S3C2400 manual chapter 19) */
-typedef struct {
+struct s3c2400_mmc {
#ifdef __BIG_ENDIAN
S3C24X0_REG8 res1[3];
S3C24X0_REG8 MMCON;
@@ -623,11 +623,11 @@ typedef struct {
S3C24X0_REG8 MMDAT;
S3C24X0_REG8 res11[3];
#endif
-} /*__attribute__((__packed__))*/ S3C2400_MMC;
+};
/* SD INTERFACE (see S3C2410 manual chapter 19) */
-typedef struct {
+struct s3c2410_sdi {
S3C24X0_REG32 SDICON;
S3C24X0_REG32 SDIPRE;
S3C24X0_REG32 SDICARG;
@@ -651,491 +651,6 @@ typedef struct {
S3C24X0_REG8 res[3];
#endif
S3C24X0_REG32 SDIIMSK;
-} /*__attribute__((__packed__))*/ S3C2410_SDI;
-
-
-#if 0
-/* Memory control */
-#define rBWSCON (*(volatile unsigned *)0x48000000)
-#define rBANKCON0 (*(volatile unsigned *)0x48000004)
-#define rBANKCON1 (*(volatile unsigned *)0x48000008)
-#define rBANKCON2 (*(volatile unsigned *)0x4800000C)
-#define rBANKCON3 (*(volatile unsigned *)0x48000010)
-#define rBANKCON4 (*(volatile unsigned *)0x48000014)
-#define rBANKCON5 (*(volatile unsigned *)0x48000018)
-#define rBANKCON6 (*(volatile unsigned *)0x4800001C)
-#define rBANKCON7 (*(volatile unsigned *)0x48000020)
-#define rREFRESH (*(volatile unsigned *)0x48000024)
-#define rBANKSIZE (*(volatile unsigned *)0x48000028)
-#define rMRSRB6 (*(volatile unsigned *)0x4800002C)
-#define rMRSRB7 (*(volatile unsigned *)0x48000030)
-
-
-/* USB HOST */
-#define rHcRevision (*(volatile unsigned *)0x49000000)
-#define rHcControl (*(volatile unsigned *)0x49000004)
-#define rHcCommonStatus (*(volatile unsigned *)0x49000008)
-#define rHcInterruptStatus (*(volatile unsigned *)0x4900000C)
-#define rHcInterruptEnable (*(volatile unsigned *)0x49000010)
-#define rHcInterruptDisable (*(volatile unsigned *)0x49000014)
-#define rHcHCCA (*(volatile unsigned *)0x49000018)
-#define rHcPeriodCuttendED (*(volatile unsigned *)0x4900001C)
-#define rHcControlHeadED (*(volatile unsigned *)0x49000020)
-#define rHcControlCurrentED (*(volatile unsigned *)0x49000024)
-#define rHcBulkHeadED (*(volatile unsigned *)0x49000028)
-#define rHcBuldCurrentED (*(volatile unsigned *)0x4900002C)
-#define rHcDoneHead (*(volatile unsigned *)0x49000030)
-#define rHcRmInterval (*(volatile unsigned *)0x49000034)
-#define rHcFmRemaining (*(volatile unsigned *)0x49000038)
-#define rHcFmNumber (*(volatile unsigned *)0x4900003C)
-#define rHcPeriodicStart (*(volatile unsigned *)0x49000040)
-#define rHcLSThreshold (*(volatile unsigned *)0x49000044)
-#define rHcRhDescriptorA (*(volatile unsigned *)0x49000048)
-#define rHcRhDescriptorB (*(volatile unsigned *)0x4900004C)
-#define rHcRhStatus (*(volatile unsigned *)0x49000050)
-#define rHcRhPortStatus1 (*(volatile unsigned *)0x49000054)
-#define rHcRhPortStatus2 (*(volatile unsigned *)0x49000058)
-
-
-/* INTERRUPT */
-#define rSRCPND (*(volatile unsigned *)0x4A000000)
-#define rINTMOD (*(volatile unsigned *)0x4A000004)
-#define rINTMSK (*(volatile unsigned *)0x4A000008)
-#define rPRIORITY (*(volatile unsigned *)0x4A00000C)
-#define rINTPND (*(volatile unsigned *)0x4A000010)
-#define rINTOFFSET (*(volatile unsigned *)0x4A000014)
-#define rSUBSRCPND (*(volatile unsigned *)0x4A000018)
-#define rINTSUBMSK (*(volatile unsigned *)0x4A00001C)
-
-
-/* DMA */
-#define rDISRC0 (*(volatile unsigned *)0x4B000000)
-#define rDISRCC0 (*(volatile unsigned *)0x4B000004)
-#define rDIDST0 (*(volatile unsigned *)0x4B000008)
-#define rDIDSTC0 (*(volatile unsigned *)0x4B00000C)
-#define rDCON0 (*(volatile unsigned *)0x4B000010)
-#define rDSTAT0 (*(volatile unsigned *)0x4B000014)
-#define rDCSRC0 (*(volatile unsigned *)0x4B000018)
-#define rDCDST0 (*(volatile unsigned *)0x4B00001C)
-#define rDMASKTRIG0 (*(volatile unsigned *)0x4B000020)
-#define rDISRC1 (*(volatile unsigned *)0x4B000040)
-#define rDISRCC1 (*(volatile unsigned *)0x4B000044)
-#define rDIDST1 (*(volatile unsigned *)0x4B000048)
-#define rDIDSTC1 (*(volatile unsigned *)0x4B00004C)
-#define rDCON1 (*(volatile unsigned *)0x4B000050)
-#define rDSTAT1 (*(volatile unsigned *)0x4B000054)
-#define rDCSRC1 (*(volatile unsigned *)0x4B000058)
-#define rDCDST1 (*(volatile unsigned *)0x4B00005C)
-#define rDMASKTRIG1 (*(volatile unsigned *)0x4B000060)
-#define rDISRC2 (*(volatile unsigned *)0x4B000080)
-#define rDISRCC2 (*(volatile unsigned *)0x4B000084)
-#define rDIDST2 (*(volatile unsigned *)0x4B000088)
-#define rDIDSTC2 (*(volatile unsigned *)0x4B00008C)
-#define rDCON2 (*(volatile unsigned *)0x4B000090)
-#define rDSTAT2 (*(volatile unsigned *)0x4B000094)
-#define rDCSRC2 (*(volatile unsigned *)0x4B000098)
-#define rDCDST2 (*(volatile unsigned *)0x4B00009C)
-#define rDMASKTRIG2 (*(volatile unsigned *)0x4B0000A0)
-#define rDISRC3 (*(volatile unsigned *)0x4B0000C0)
-#define rDISRCC3 (*(volatile unsigned *)0x4B0000C4)
-#define rDIDST3 (*(volatile unsigned *)0x4B0000C8)
-#define rDIDSTC3 (*(volatile unsigned *)0x4B0000CC)
-#define rDCON3 (*(volatile unsigned *)0x4B0000D0)
-#define rDSTAT3 (*(volatile unsigned *)0x4B0000D4)
-#define rDCSRC3 (*(volatile unsigned *)0x4B0000D8)
-#define rDCDST3 (*(volatile unsigned *)0x4B0000DC)
-#define rDMASKTRIG3 (*(volatile unsigned *)0x4B0000E0)
-
-
-/* CLOCK & POWER MANAGEMENT */
-#define rLOCKTIME (*(volatile unsigned *)0x4C000000)
-#define rMPLLCON (*(volatile unsigned *)0x4C000004)
-#define rUPLLCON (*(volatile unsigned *)0x4C000008)
-#define rCLKCON (*(volatile unsigned *)0x4C00000C)
-#define rCLKSLOW (*(volatile unsigned *)0x4C000010)
-#define rCLKDIVN (*(volatile unsigned *)0x4C000014)
-
-
-/* LCD CONTROLLER */
-#define rLCDCON1 (*(volatile unsigned *)0x4D000000)
-#define rLCDCON2 (*(volatile unsigned *)0x4D000004)
-#define rLCDCON3 (*(volatile unsigned *)0x4D000008)
-#define rLCDCON4 (*(volatile unsigned *)0x4D00000C)
-#define rLCDCON5 (*(volatile unsigned *)0x4D000010)
-#define rLCDSADDR1 (*(volatile unsigned *)0x4D000014)
-#define rLCDSADDR2 (*(volatile unsigned *)0x4D000018)
-#define rLCDSADDR3 (*(volatile unsigned *)0x4D00001C)
-#define rREDLUT (*(volatile unsigned *)0x4D000020)
-#define rGREENLUT (*(volatile unsigned *)0x4D000024)
-#define rBLUELUT (*(volatile unsigned *)0x4D000028)
-#define rDITHMODE (*(volatile unsigned *)0x4D00004C)
-#define rTPAL (*(volatile unsigned *)0x4D000050)
-#define rLCDINTPND (*(volatile unsigned *)0x4D000054)
-#define rLCDSRCPND (*(volatile unsigned *)0x4D000058)
-#define rLCDINTMSK (*(volatile unsigned *)0x4D00005C)
-
-
-/* NAND FLASH */
-#define rNFCONF (*(volatile unsigned *)0x4E000000)
-#define rNFCMD (*(volatile unsigned *)0x4E000004)
-#define rNFADDR (*(volatile unsigned *)0x4E000008)
-#define rNFDATA (*(volatile unsigned *)0x4E00000C)
-#define rNFSTAT (*(volatile unsigned *)0x4E000010)
-#define rNFECC (*(volatile unsigned *)0x4E000014)
-
-
-/* UART */
-#define rULCON0 (*(volatile unsigned *)0x50000000)
-#define rUCON0 (*(volatile unsigned *)0x50000004)
-#define rUFCON0 (*(volatile unsigned *)0x50000008)
-#define rUMCON0 (*(volatile unsigned *)0x5000000C)
-#define rUTRSTAT0 (*(volatile unsigned *)0x50000010)
-#define rUERSTAT0 (*(volatile unsigned *)0x50000014)
-#define rUFSTAT0 (*(volatile unsigned *)0x50000018)
-#define rUMSTAT0 (*(volatile unsigned *)0x5000001C)
-#define rUBRDIV0 (*(volatile unsigned *)0x50000028)
-
-#define rULCON1 (*(volatile unsigned *)0x50004000)
-#define rUCON1 (*(volatile unsigned *)0x50004004)
-#define rUFCON1 (*(volatile unsigned *)0x50004008)
-#define rUMCON1 (*(volatile unsigned *)0x5000400C)
-#define rUTRSTAT1 (*(volatile unsigned *)0x50004010)
-#define rUERSTAT1 (*(volatile unsigned *)0x50004014)
-#define rUFSTAT1 (*(volatile unsigned *)0x50004018)
-#define rUMSTAT1 (*(volatile unsigned *)0x5000401C)
-#define rUBRDIV1 (*(volatile unsigned *)0x50004028)
-
-#define rULCON2 (*(volatile unsigned *)0x50008000)
-#define rUCON2 (*(volatile unsigned *)0x50008004)
-#define rUFCON2 (*(volatile unsigned *)0x50008008)
-#define rUTRSTAT2 (*(volatile unsigned *)0x50008010)
-#define rUERSTAT2 (*(volatile unsigned *)0x50008014)
-#define rUFSTAT2 (*(volatile unsigned *)0x50008018)
-#define rUBRDIV2 (*(volatile unsigned *)0x50008028)
-
-#ifdef __BIG_ENDIAN
-#define rUTXH0 (*(volatile unsigned char *)0x50000023)
-#define rURXH0 (*(volatile unsigned char *)0x50000027)
-#define rUTXH1 (*(volatile unsigned char *)0x50004023)
-#define rURXH1 (*(volatile unsigned char *)0x50004027)
-#define rUTXH2 (*(volatile unsigned char *)0x50008023)
-#define rURXH2 (*(volatile unsigned char *)0x50008027)
-
-#define WrUTXH0(ch) (*(volatile unsigned char *)0x50000023)=(unsigned char)(ch)
-#define RdURXH0() (*(volatile unsigned char *)0x50000027)
-#define WrUTXH1(ch) (*(volatile unsigned char *)0x50004023)=(unsigned char)(ch)
-#define RdURXH1() (*(volatile unsigned char *)0x50004027)
-#define WrUTXH2(ch) (*(volatile unsigned char *)0x50008023)=(unsigned char)(ch)
-#define RdURXH2() (*(volatile unsigned char *)0x50008027)
-
-#define UTXH0 (0x50000020+3) /* byte_access address by DMA */
-#define URXH0 (0x50000024+3)
-#define UTXH1 (0x50004020+3)
-#define URXH1 (0x50004024+3)
-#define UTXH2 (0x50008020+3)
-#define URXH2 (0x50008024+3)
-
-#else /* Little Endian */
-#define rUTXH0 (*(volatile unsigned char *)0x50000020)
-#define rURXH0 (*(volatile unsigned char *)0x50000024)
-#define rUTXH1 (*(volatile unsigned char *)0x50004020)
-#define rURXH1 (*(volatile unsigned char *)0x50004024)
-#define rUTXH2 (*(volatile unsigned char *)0x50008020)
-#define rURXH2 (*(volatile unsigned char *)0x50008024)
-
-#define WrUTXH0(ch) (*(volatile unsigned char *)0x50000020)=(unsigned char)(ch)
-#define RdURXH0() (*(volatile unsigned char *)0x50000024)
-#define WrUTXH1(ch) (*(volatile unsigned char *)0x50004020)=(unsigned char)(ch)
-#define RdURXH1() (*(volatile unsigned char *)0x50004024)
-#define WrUTXH2(ch) (*(volatile unsigned char *)0x50008020)=(unsigned char)(ch)
-#define RdURXH2() (*(volatile unsigned char *)0x50008024)
-
-#define UTXH0 (0x50000020) /* byte_access address by DMA */
-#define URXH0 (0x50000024)
-#define UTXH1 (0x50004020)
-#define URXH1 (0x50004024)
-#define UTXH2 (0x50008020)
-#define URXH2 (0x50008024)
-#endif
-
-
-/* PWM TIMER */
-#define rTCFG0 (*(volatile unsigned *)0x51000000)
-#define rTCFG1 (*(volatile unsigned *)0x51000004)
-#define rTCON (*(volatile unsigned *)0x51000008)
-#define rTCNTB0 (*(volatile unsigned *)0x5100000C)
-#define rTCMPB0 (*(volatile unsigned *)0x51000010)
-#define rTCNTO0 (*(volatile unsigned *)0x51000014)
-#define rTCNTB1 (*(volatile unsigned *)0x51000018)
-#define rTCMPB1 (*(volatile unsigned *)0x5100001C)
-#define rTCNTO1 (*(volatile unsigned *)0x51000020)
-#define rTCNTB2 (*(volatile unsigned *)0x51000024)
-#define rTCMPB2 (*(volatile unsigned *)0x51000028)
-#define rTCNTO2 (*(volatile unsigned *)0x5100002C)
-#define rTCNTB3 (*(volatile unsigned *)0x51000030)
-#define rTCMPB3 (*(volatile unsigned *)0x51000034)
-#define rTCNTO3 (*(volatile unsigned *)0x51000038)
-#define rTCNTB4 (*(volatile unsigned *)0x5100003C)
-#define rTCNTO4 (*(volatile unsigned *)0x51000040)
-
-
-/* USB DEVICE */
-#ifdef __BIG_ENDIAN
-#define rFUNC_ADDR_REG (*(volatile unsigned char *)0x52000143)
-#define rPWR_REG (*(volatile unsigned char *)0x52000147)
-#define rEP_INT_REG (*(volatile unsigned char *)0x5200014B)
-#define rUSB_INT_REG (*(volatile unsigned char *)0x5200015B)
-#define rEP_INT_EN_REG (*(volatile unsigned char *)0x5200015F)
-#define rUSB_INT_EN_REG (*(volatile unsigned char *)0x5200016F)
-#define rFRAME_NUM1_REG (*(volatile unsigned char *)0x52000173)
-#define rFRAME_NUM2_REG (*(volatile unsigned char *)0x52000177)
-#define rINDEX_REG (*(volatile unsigned char *)0x5200017B)
-#define rMAXP_REG (*(volatile unsigned char *)0x52000183)
-#define rEP0_CSR (*(volatile unsigned char *)0x52000187)
-#define rIN_CSR1_REG (*(volatile unsigned char *)0x52000187)
-#define rIN_CSR2_REG (*(volatile unsigned char *)0x5200018B)
-#define rOUT_CSR1_REG (*(volatile unsigned char *)0x52000193)
-#define rOUT_CSR2_REG (*(volatile unsigned char *)0x52000197)
-#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)0x5200019B)
-#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)0x5200019F)
-#define rEP0_FIFO (*(volatile unsigned char *)0x520001C3)
-#define rEP1_FIFO (*(volatile unsigned char *)0x520001C7)
-#define rEP2_FIFO (*(volatile unsigned char *)0x520001CB)
-#define rEP3_FIFO (*(volatile unsigned char *)0x520001CF)
-#define rEP4_FIFO (*(volatile unsigned char *)0x520001D3)
-#define rEP1_DMA_CON (*(volatile unsigned char *)0x52000203)
-#define rEP1_DMA_UNIT (*(volatile unsigned char *)0x52000207)
-#define rEP1_DMA_FIFO (*(volatile unsigned char *)0x5200020B)
-#define rEP1_DMA_TX_LO (*(volatile unsigned char *)0x5200020F)
-#define rEP1_DMA_TX_MD (*(volatile unsigned char *)0x52000213)
-#define rEP1_DMA_TX_HI (*(volatile unsigned char *)0x52000217)
-#define rEP2_DMA_CON (*(volatile unsigned char *)0x5200021B)
-#define rEP2_DMA_UNIT (*(volatile unsigned char *)0x5200021F)
-#define rEP2_DMA_FIFO (*(volatile unsigned char *)0x52000223)
-#define rEP2_DMA_TX_LO (*(volatile unsigned char *)0x52000227)
-#define rEP2_DMA_TX_MD (*(volatile unsigned char *)0x5200022B)
-#define rEP2_DMA_TX_HI (*(volatile unsigned char *)0x5200022F)
-#define rEP3_DMA_CON (*(volatile unsigned char *)0x52000243)
-#define rEP3_DMA_UNIT (*(volatile unsigned char *)0x52000247)
-#define rEP3_DMA_FIFO (*(volatile unsigned char *)0x5200024B)
-#define rEP3_DMA_TX_LO (*(volatile unsigned char *)0x5200024F)
-#define rEP3_DMA_TX_MD (*(volatile unsigned char *)0x52000253)
-#define rEP3_DMA_TX_HI (*(volatile unsigned char *)0x52000257)
-#define rEP4_DMA_CON (*(volatile unsigned char *)0x5200025B)
-#define rEP4_DMA_UNIT (*(volatile unsigned char *)0x5200025F)
-#define rEP4_DMA_FIFO (*(volatile unsigned char *)0x52000263)
-#define rEP4_DMA_TX_LO (*(volatile unsigned char *)0x52000267)
-#define rEP4_DMA_TX_MD (*(volatile unsigned char *)0x5200026B)
-#define rEP4_DMA_TX_HI (*(volatile unsigned char *)0x5200026F)
-#else /* little endian */
-#define rFUNC_ADDR_REG (*(volatile unsigned char *)0x52000140)
-#define rPWR_REG (*(volatile unsigned char *)0x52000144)
-#define rEP_INT_REG (*(volatile unsigned char *)0x52000148)
-#define rUSB_INT_REG (*(volatile unsigned char *)0x52000158)
-#define rEP_INT_EN_REG (*(volatile unsigned char *)0x5200015C)
-#define rUSB_INT_EN_REG (*(volatile unsigned char *)0x5200016C)
-#define rFRAME_NUM1_REG (*(volatile unsigned char *)0x52000170)
-#define rFRAME_NUM2_REG (*(volatile unsigned char *)0x52000174)
-#define rINDEX_REG (*(volatile unsigned char *)0x52000178)
-#define rMAXP_REG (*(volatile unsigned char *)0x52000180)
-#define rEP0_CSR (*(volatile unsigned char *)0x52000184)
-#define rIN_CSR1_REG (*(volatile unsigned char *)0x52000184)
-#define rIN_CSR2_REG (*(volatile unsigned char *)0x52000188)
-#define rOUT_CSR1_REG (*(volatile unsigned char *)0x52000190)
-#define rOUT_CSR2_REG (*(volatile unsigned char *)0x52000194)
-#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)0x52000198)
-#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)0x5200019C)
-#define rEP0_FIFO (*(volatile unsigned char *)0x520001C0)
-#define rEP1_FIFO (*(volatile unsigned char *)0x520001C4)
-#define rEP2_FIFO (*(volatile unsigned char *)0x520001C8)
-#define rEP3_FIFO (*(volatile unsigned char *)0x520001CC)
-#define rEP4_FIFO (*(volatile unsigned char *)0x520001D0)
-#define rEP1_DMA_CON (*(volatile unsigned char *)0x52000200)
-#define rEP1_DMA_UNIT (*(volatile unsigned char *)0x52000204)
-#define rEP1_DMA_FIFO (*(volatile unsigned char *)0x52000208)
-#define rEP1_DMA_TX_LO (*(volatile unsigned char *)0x5200020C)
-#define rEP1_DMA_TX_MD (*(volatile unsigned char *)0x52000210)
-#define rEP1_DMA_TX_HI (*(volatile unsigned char *)0x52000214)
-#define rEP2_DMA_CON (*(volatile unsigned char *)0x52000218)
-#define rEP2_DMA_UNIT (*(volatile unsigned char *)0x5200021C)
-#define rEP2_DMA_FIFO (*(volatile unsigned char *)0x52000220)
-#define rEP2_DMA_TX_LO (*(volatile unsigned char *)0x52000224)
-#define rEP2_DMA_TX_MD (*(volatile unsigned char *)0x52000228)
-#define rEP2_DMA_TX_HI (*(volatile unsigned char *)0x5200022C)
-#define rEP3_DMA_CON (*(volatile unsigned char *)0x52000240)
-#define rEP3_DMA_UNIT (*(volatile unsigned char *)0x52000244)
-#define rEP3_DMA_FIFO (*(volatile unsigned char *)0x52000248)
-#define rEP3_DMA_TX_LO (*(volatile unsigned char *)0x5200024C)
-#define rEP3_DMA_TX_MD (*(volatile unsigned char *)0x52000250)
-#define rEP3_DMA_TX_HI (*(volatile unsigned char *)0x52000254)
-#define rEP4_DMA_CON (*(volatile unsigned char *)0x52000258)
-#define rEP4_DMA_UNIT (*(volatile unsigned char *)0x5200025C)
-#define rEP4_DMA_FIFO (*(volatile unsigned char *)0x52000260)
-#define rEP4_DMA_TX_LO (*(volatile unsigned char *)0x52000264)
-#define rEP4_DMA_TX_MD (*(volatile unsigned char *)0x52000268)
-#define rEP4_DMA_TX_HI (*(volatile unsigned char *)0x5200026C)
-#endif /* __BIG_ENDIAN */
-
-
-/* WATCH DOG TIMER */
-#define rWTCON (*(volatile unsigned *)0x53000000)
-#define rWTDAT (*(volatile unsigned *)0x53000004)
-#define rWTCNT (*(volatile unsigned *)0x53000008)
-
-
-/* IIC */
-#define rIICCON (*(volatile unsigned *)0x54000000)
-#define rIICSTAT (*(volatile unsigned *)0x54000004)
-#define rIICADD (*(volatile unsigned *)0x54000008)
-#define rIICDS (*(volatile unsigned *)0x5400000C)
-
-
-/* IIS */
-#define rIISCON (*(volatile unsigned *)0x55000000)
-#define rIISMOD (*(volatile unsigned *)0x55000004)
-#define rIISPSR (*(volatile unsigned *)0x55000008)
-#define rIISFCON (*(volatile unsigned *)0x5500000C)
-
-#ifdef __BIG_ENDIAN
-#define IISFIF ((volatile unsigned short *)0x55000012)
-#else /* little endian */
-#define IISFIF ((volatile unsigned short *)0x55000010)
-#endif
-
-
-/* I/O PORT */
-#define rGPACON (*(volatile unsigned *)0x56000000)
-#define rGPADAT (*(volatile unsigned *)0x56000004)
-
-#define rGPBCON (*(volatile unsigned *)0x56000010)
-#define rGPBDAT (*(volatile unsigned *)0x56000014)
-#define rGPBUP (*(volatile unsigned *)0x56000018)
-
-#define rGPCCON (*(volatile unsigned *)0x56000020)
-#define rGPCDAT (*(volatile unsigned *)0x56000024)
-#define rGPCUP (*(volatile unsigned *)0x56000028)
-
-#define rGPDCON (*(volatile unsigned *)0x56000030)
-#define rGPDDAT (*(volatile unsigned *)0x56000034)
-#define rGPDUP (*(volatile unsigned *)0x56000038)
-
-#define rGPECON (*(volatile unsigned *)0x56000040)
-#define rGPEDAT (*(volatile unsigned *)0x56000044)
-#define rGPEUP (*(volatile unsigned *)0x56000048)
-
-#define rGPFCON (*(volatile unsigned *)0x56000050)
-#define rGPFDAT (*(volatile unsigned *)0x56000054)
-#define rGPFUP (*(volatile unsigned *)0x56000058)
-
-#define rGPGCON (*(volatile unsigned *)0x56000060)
-#define rGPGDAT (*(volatile unsigned *)0x56000064)
-#define rGPGUP (*(volatile unsigned *)0x56000068)
-
-#define rGPHCON (*(volatile unsigned *)0x56000070)
-#define rGPHDAT (*(volatile unsigned *)0x56000074)
-#define rGPHUP (*(volatile unsigned *)0x56000078)
-
-#define rMISCCR (*(volatile unsigned *)0x56000080)
-#define rDCLKCON (*(volatile unsigned *)0x56000084)
-#define rEXTINT0 (*(volatile unsigned *)0x56000088)
-#define rEXTINT1 (*(volatile unsigned *)0x5600008C)
-#define rEXTINT2 (*(volatile unsigned *)0x56000090)
-#define rEINTFLT0 (*(volatile unsigned *)0x56000094)
-#define rEINTFLT1 (*(volatile unsigned *)0x56000098)
-#define rEINTFLT2 (*(volatile unsigned *)0x5600009C)
-#define rEINTFLT3 (*(volatile unsigned *)0x560000A0)
-#define rEINTMASK (*(volatile unsigned *)0x560000A4)
-#define rEINTPEND (*(volatile unsigned *)0x560000A8)
-#define rGSTATUS0 (*(volatile unsigned *)0x560000AC)
-#define rGSTATUS1 (*(volatile unsigned *)0x560000B0)
-
-
-/* RTC */
-#ifdef __BIG_ENDIAN
-#define rRTCCON (*(volatile unsigned char *)0x57000043)
-#define rTICNT (*(volatile unsigned char *)0x57000047)
-#define rRTCALM (*(volatile unsigned char *)0x57000053)
-#define rALMSEC (*(volatile unsigned char *)0x57000057)
-#define rALMMIN (*(volatile unsigned char *)0x5700005B)
-#define rALMHOUR (*(volatile unsigned char *)0x5700005F)
-#define rALMDATE (*(volatile unsigned char *)0x57000063)
-#define rALMMON (*(volatile unsigned char *)0x57000067)
-#define rALMYEAR (*(volatile unsigned char *)0x5700006B)
-#define rRTCRST (*(volatile unsigned char *)0x5700006F)
-#define rBCDSEC (*(volatile unsigned char *)0x57000073)
-#define rBCDMIN (*(volatile unsigned char *)0x57000077)
-#define rBCDHOUR (*(volatile unsigned char *)0x5700007B)
-#define rBCDDATE (*(volatile unsigned char *)0x5700007F)
-#define rBCDDAY (*(volatile unsigned char *)0x57000083)
-#define rBCDMON (*(volatile unsigned char *)0x57000087)
-#define rBCDYEAR (*(volatile unsigned char *)0x5700008B)
-#else /* little endian */
-#define rRTCCON (*(volatile unsigned char *)0x57000040)
-#define rTICNT (*(volatile unsigned char *)0x57000044)
-#define rRTCALM (*(volatile unsigned char *)0x57000050)
-#define rALMSEC (*(volatile unsigned char *)0x57000054)
-#define rALMMIN (*(volatile unsigned char *)0x57000058)
-#define rALMHOUR (*(volatile unsigned char *)0x5700005C)
-#define rALMDATE (*(volatile unsigned char *)0x57000060)
-#define rALMMON (*(volatile unsigned char *)0x57000064)
-#define rALMYEAR (*(volatile unsigned char *)0x57000068)
-#define rRTCRST (*(volatile unsigned char *)0x5700006C)
-#define rBCDSEC (*(volatile unsigned char *)0x57000070)
-#define rBCDMIN (*(volatile unsigned char *)0x57000074)
-#define rBCDHOUR (*(volatile unsigned char *)0x57000078)
-#define rBCDDATE (*(volatile unsigned char *)0x5700007C)
-#define rBCDDAY (*(volatile unsigned char *)0x57000080)
-#define rBCDMON (*(volatile unsigned char *)0x57000084)
-#define rBCDYEAR (*(volatile unsigned char *)0x57000088)
-#endif
-
-
-/* ADC */
-#define rADCCON (*(volatile unsigned *)0x58000000)
-#define rADCTSC (*(volatile unsigned *)0x58000004)
-#define rADCDLY (*(volatile unsigned *)0x58000008)
-#define rADCDAT0 (*(volatile unsigned *)0x5800000C)
-#define rADCDAT1 (*(volatile unsigned *)0x58000010)
-
-
-/* SPI */
-#define rSPCON0 (*(volatile unsigned *)0x59000000)
-#define rSPSTA0 (*(volatile unsigned *)0x59000004)
-#define rSPPIN0 (*(volatile unsigned *)0x59000008)
-#define rSPPRE0 (*(volatile unsigned *)0x5900000C)
-#define rSPTDAT0 (*(volatile unsigned *)0x59000010)
-#define rSPRDAT0 (*(volatile unsigned *)0x59000014)
-#define rSPCON1 (*(volatile unsigned *)0x59000020)
-#define rSPSTA1 (*(volatile unsigned *)0x59000024)
-#define rSPPIN1 (*(volatile unsigned *)0x59000028)
-#define rSPPRE1 (*(volatile unsigned *)0x5900002C)
-#define rSPTDAT1 (*(volatile unsigned *)0x59000030)
-#define rSPRDAT1 (*(volatile unsigned *)0x59000034)
-
-
-/* SD INTERFACE */
-#define rSDICON (*(volatile unsigned *)0x5A000000)
-#define rSDIPRE (*(volatile unsigned *)0x5A000004)
-#define rSDICmdArg (*(volatile unsigned *)0x5A000008)
-#define rSDICmdCon (*(volatile unsigned *)0x5A00000C)
-#define rSDICmdSta (*(volatile unsigned *)0x5A000010)
-#define rSDIRSP0 (*(volatile unsigned *)0x5A000014)
-#define rSDIRSP1 (*(volatile unsigned *)0x5A000018)
-#define rSDIRSP2 (*(volatile unsigned *)0x5A00001C)
-#define rSDIRSP3 (*(volatile unsigned *)0x5A000020)
-#define rSDIDTimer (*(volatile unsigned *)0x5A000024)
-#define rSDIBSize (*(volatile unsigned *)0x5A000028)
-#define rSDIDatCon (*(volatile unsigned *)0x5A00002C)
-#define rSDIDatCnt (*(volatile unsigned *)0x5A000030)
-#define rSDIDatSta (*(volatile unsigned *)0x5A000034)
-#define rSDIFSTA (*(volatile unsigned *)0x5A000038)
-#ifdef __BIG_ENDIAN
-#define rSDIDAT (*(volatile unsigned char *)0x5A00003F)
-#else
-#define rSDIDAT (*(volatile unsigned char *)0x5A00003C)
-#endif
-#define rSDIIntMsk (*(volatile unsigned *)0x5A000040)
-
-#endif
+};
#endif /*__S3C24X0_H__*/