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| author | Niklaus Giger <niklaus.giger@member.fsf.org> | 2009-10-04 20:04:22 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-10-07 09:15:30 +0200 |
| commit | dbcc357166bed20df13450e93a501f30b197efd1 (patch) | |
| tree | 3bf9b959af6869f8fcc80202cd7b44fdc14218ba /include/ppc4xx.h | |
| parent | 78d2a641371ec71cc3786b167a318c7b115fbb90 (diff) | |
| download | u-boot-imx-dbcc357166bed20df13450e93a501f30b197efd1.zip u-boot-imx-dbcc357166bed20df13450e93a501f30b197efd1.tar.gz u-boot-imx-dbcc357166bed20df13450e93a501f30b197efd1.tar.bz2 | |
ppc4xx: respect 80-chars per line in ppc*.h files
After running checkstyle.pl on the three previous patches I noted that in
the *.h files there were a lot of long lines. This patch solves this problem.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc4xx.h')
| -rw-r--r-- | include/ppc4xx.h | 36 |
1 files changed, 22 insertions, 14 deletions
diff --git a/include/ppc4xx.h b/include/ppc4xx.h index 086f8fb..3bff00a 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -136,12 +136,12 @@ * Common stuff for 4xx (405 and 440) */ -#define EXC_OFF_SYS_RESET 0x0100 /* System reset */ +#define EXC_OFF_SYS_RESET 0x0100 /* System reset */ #define _START_OFFSET (EXC_OFF_SYS_RESET + 0x2000) #define RESET_VECTOR 0xfffffffc -#define CACHELINE_MASK (CONFIG_SYS_CACHELINE_SIZE - 1) /* Address mask for cache - line aligned data. */ +#define CACHELINE_MASK (CONFIG_SYS_CACHELINE_SIZE - 1) /* Address mask for + cache line aligned data. */ #define CPR0_DCR_BASE 0x0C #define CPR0_CFGADDR (CPR0_DCR_BASE + 0x0) @@ -162,17 +162,25 @@ /* * Macros for indirect DCR access */ -#define mtcpr(reg, d) do { mtdcr(CPR0_CFGADDR,reg);mtdcr(CPR0_CFGDATA,d); } while (0) -#define mfcpr(reg, d) do { mtdcr(CPR0_CFGADDR,reg);d = mfdcr(CPR0_CFGDATA); } while (0) - -#define mtebc(reg, d) do { mtdcr(EBC0_CFGADDR,reg);mtdcr(EBC0_CFGDATA,d); } while (0) -#define mfebc(reg, d) do { mtdcr(EBC0_CFGADDR,reg);d = mfdcr(EBC0_CFGDATA); } while (0) - -#define mtsdram(reg, d) do { mtdcr(SDRAM0_CFGADDR,reg);mtdcr(SDRAM0_CFGDATA,d); } while (0) -#define mfsdram(reg, d) do { mtdcr(SDRAM0_CFGADDR,reg);d = mfdcr(SDRAM0_CFGDATA); } while (0) - -#define mtsdr(reg, d) do { mtdcr(SDR0_CFGADDR,reg);mtdcr(SDR0_CFGDATA,d); } while (0) -#define mfsdr(reg, d) do { mtdcr(SDR0_CFGADDR,reg);d = mfdcr(SDR0_CFGDATA); } while (0) +#define mtcpr(reg, d) \ + do { mtdcr(CPR0_CFGADDR, reg); mtdcr(CPR0_CFGDATA, d); } while (0) +#define mfcpr(reg, d) \ + do { mtdcr(CPR0_CFGADDR, reg); d = mfdcr(CPR0_CFGDATA); } while (0) + +#define mtebc(reg, d) \ + do { mtdcr(EBC0_CFGADDR, reg); mtdcr(EBC0_CFGDATA, d); } while (0) +#define mfebc(reg, d) \ + do { mtdcr(EBC0_CFGADDR, reg); d = mfdcr(EBC0_CFGDATA); } while (0) + +#define mtsdram(reg, d) \ + do { mtdcr(SDRAM0_CFGADDR, reg); mtdcr(SDRAM0_CFGDATA, d); } while (0) +#define mfsdram(reg, d) \ + do { mtdcr(SDRAM0_CFGADDR, reg); d = mfdcr(SDRAM0_CFGDATA); } while (0) + +#define mtsdr(reg, d) \ + do { mtdcr(SDR0_CFGADDR, reg); mtdcr(SDR0_CFGDATA, d); } while (0) +#define mfsdr(reg, d) \ + do { mtdcr(SDR0_CFGADDR, reg); d = mfdcr(SDR0_CFGDATA); } while (0) #ifndef __ASSEMBLY__ |