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author | Stefan Roese <sr@denx.de> | 2008-08-21 11:05:03 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2008-08-21 11:05:03 +0200 |
commit | f556483734126793522fb7a8cf36af90da78f084 (patch) | |
tree | c872485b1c83e4c941ad674487a4e60acc6881ae /include/ppc4xx.h | |
parent | 079589bcfb24ba11068460276a3cc9549ab5346f (diff) | |
download | u-boot-imx-f556483734126793522fb7a8cf36af90da78f084.zip u-boot-imx-f556483734126793522fb7a8cf36af90da78f084.tar.gz u-boot-imx-f556483734126793522fb7a8cf36af90da78f084.tar.bz2 |
ppc4xx: Cleanup of "ppc4xx: Optimize PLB4 Arbiter..." patch
This patch fixes some minor issues introduced with the patch:
ppc4xx: Optimize PLB4 Arbiter... from Prodyut Hazarika:
- Rework memory-queue and PLB arbiter optimization code, that the
local variable is not needed anymore. This removes one #ifdef.
- Use consistant spacing in ppc4xx.h header (XXX + 0x01 instead
of XXX+ 0x01). This was not introduced by Prodyut, just a
copy-paste problem.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc4xx.h')
-rw-r--r-- | include/ppc4xx.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/include/ppc4xx.h b/include/ppc4xx.h index e1613dd..59a3b06 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -56,8 +56,8 @@ #define PLB_ARBITER_BASE 0x80 -#define plb0_revid (PLB_ARBITER_BASE+ 0x00) -#define plb0_acr (PLB_ARBITER_BASE+ 0x01) +#define plb0_revid (PLB_ARBITER_BASE + 0x00) +#define plb0_acr (PLB_ARBITER_BASE + 0x01) #define plb0_acr_ppm_mask 0xF0000000 #define plb0_acr_ppm_fixed 0x00000000 #define plb0_acr_ppm_fair 0xD0000000 @@ -73,13 +73,13 @@ #define plb0_acr_wrp_disabled 0x00000000 #define plb0_acr_wrp_2deep 0x01000000 -#define plb0_besrl (PLB_ARBITER_BASE+ 0x02) -#define plb0_besrh (PLB_ARBITER_BASE+ 0x03) -#define plb0_bearl (PLB_ARBITER_BASE+ 0x04) -#define plb0_bearh (PLB_ARBITER_BASE+ 0x05) -#define plb0_ccr (PLB_ARBITER_BASE+ 0x08) +#define plb0_besrl (PLB_ARBITER_BASE + 0x02) +#define plb0_besrh (PLB_ARBITER_BASE + 0x03) +#define plb0_bearl (PLB_ARBITER_BASE + 0x04) +#define plb0_bearh (PLB_ARBITER_BASE + 0x05) +#define plb0_ccr (PLB_ARBITER_BASE + 0x08) -#define plb1_acr (PLB_ARBITER_BASE+ 0x09) +#define plb1_acr (PLB_ARBITER_BASE + 0x09) #define plb1_acr_ppm_mask 0xF0000000 #define plb1_acr_ppm_fixed 0x00000000 #define plb1_acr_ppm_fair 0xD0000000 @@ -95,10 +95,10 @@ #define plb1_acr_wrp_disabled 0x00000000 #define plb1_acr_wrp_2deep 0x01000000 -#define plb1_besrl (PLB_ARBITER_BASE+ 0x0A) -#define plb1_besrh (PLB_ARBITER_BASE+ 0x0B) -#define plb1_bearl (PLB_ARBITER_BASE+ 0x0C) -#define plb1_bearh (PLB_ARBITER_BASE+ 0x0D) +#define plb1_besrl (PLB_ARBITER_BASE + 0x0A) +#define plb1_besrh (PLB_ARBITER_BASE + 0x0B) +#define plb1_bearl (PLB_ARBITER_BASE + 0x0C) +#define plb1_bearh (PLB_ARBITER_BASE + 0x0D) #endif /* 440EP/EPX 440GR/GRX 440SP/SPE 460EX/GT/SX 405EX*/ |