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| author | Wolfgang Denk <wd@denx.de> | 2009-12-15 23:38:34 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-12-15 23:38:34 +0100 |
| commit | bb3bcfa2426cc6a0aecec7270e3ee67ca843a125 (patch) | |
| tree | 0314e3d8e8d9e4d568a496fca27db33d66e68bb4 /include/ppc440.h | |
| parent | a200a7c04d89853d2a1395b96d8ca5e3dd754551 (diff) | |
| parent | 4b142febff71eabdb7ddbb125c7b583b24ddc434 (diff) | |
| download | u-boot-imx-bb3bcfa2426cc6a0aecec7270e3ee67ca843a125.zip u-boot-imx-bb3bcfa2426cc6a0aecec7270e3ee67ca843a125.tar.gz u-boot-imx-bb3bcfa2426cc6a0aecec7270e3ee67ca843a125.tar.bz2 | |
Merge branch 'next' of ../next
Diffstat (limited to 'include/ppc440.h')
| -rw-r--r-- | include/ppc440.h | 22 |
1 files changed, 2 insertions, 20 deletions
diff --git a/include/ppc440.h b/include/ppc440.h index e54a977..e60fa13 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -1276,7 +1276,8 @@ #define CPC0_STRP1_PAE_MASK (0x80000000 >> 11) #define CPC0_STRP1_PISE_MASK (0x80000000 >> 13) #endif /* defined(CONFIG_440GP) */ -#if defined(CONFIG_440GX) || defined(CONFIG_440SP) +#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || \ + defined(CONFIG_460EX) || defined(CONFIG_460GT) #define SDR0_SDSTP1_PAE_MASK (0x80000000 >> 13) #define SDR0_SDSTP1_PISE_MASK (0x80000000 >> 15) #endif /* defined(CONFIG_440GX) || defined(CONFIG_440SP) */ @@ -1713,25 +1714,6 @@ #endif /*----------------------------------------------------------------------------- -| IIC Register Offsets -'----------------------------------------------------------------------------*/ -#define IICMDBUF 0x00 -#define IICSDBUF 0x02 -#define IICLMADR 0x04 -#define IICHMADR 0x05 -#define IICCNTL 0x06 -#define IICMDCNTL 0x07 -#define IICSTS 0x08 -#define IICEXTSTS 0x09 -#define IICLSADR 0x0A -#define IICHSADR 0x0B -#define IIC0_CLKDIV 0x0C -#define IICINTRMSK 0x0D -#define IICXFRCNT 0x0E -#define IICXTCNTLSS 0x0F -#define IICDIRECTCNTL 0x10 - -/*----------------------------------------------------------------------------- | PCI Internal Registers et. al. (accessed via plb) +----------------------------------------------------------------------------*/ #define PCIL0_CFGADR (CONFIG_SYS_PCI_BASE + 0x0ec00000) |