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authorStefan Roese <sr@denx.de>2007-06-15 08:18:01 +0200
committerStefan Roese <sr@denx.de>2007-06-15 08:18:01 +0200
commitb765ffb773f5a3cd5aa94ec76b6a05276b8cd5b2 (patch)
tree656f947d6d3b4cf79cb0812dc568a47b639bf93a /include/ppc440.h
parent85f737376d5ff3d5f0d45a8b657686326d175307 (diff)
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[ppc4xx] Add initial lwmon5 board support
This patch adds initial support for the Liebherr lwmon5 board euqipped with an AMCC 440EPx PowerPC. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc440.h')
-rw-r--r--include/ppc440.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/ppc440.h b/include/ppc440.h
index 07f75de..a7efcee 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -956,7 +956,8 @@
#define plb1_bearl (PLB_ARBITER_BASE+ 0x0C)
#define plb1_bearh (PLB_ARBITER_BASE+ 0x0D)
-#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
+#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
/* Pin Function Control Register 1 */
#define SDR0_PFC1 0x4101
#define SDR0_PFC1_U1ME_MASK 0x02000000 /* UART1 Mode Enable */
@@ -1103,6 +1104,8 @@
#define SDR0_PFC2_SELECT_CONFIG_5 0xC0000000 /* 2xRTBI using RGMII bridge */
#define SDR0_PFC2_SELECT_CONFIG_6 0x40000000 /* 2xSMII using ZMII bridge */
+#define SDR0_PFC4 0x4104
+
/* USB2PHY0 Control Register */
#define SDR0_USB2PHY0CR 0x4103
#define SDR0_USB2PHY0CR_UTMICN_MASK 0x00100000 /* PHY UTMI interface connection */