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| author | Stefan Roese <sr@denx.de> | 2007-07-31 08:37:01 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-07-31 08:37:01 +0200 |
| commit | ea9f6bce383cc9fbcdee28b5836109b1a6dba574 (patch) | |
| tree | d9059c7f3842f92c0bcf047b86fab4c44863ea78 /include/ppc440.h | |
| parent | 27a528fb41433c4c1e2b5d6bd3fd8d78606fc724 (diff) | |
| download | u-boot-imx-ea9f6bce383cc9fbcdee28b5836109b1a6dba574.zip u-boot-imx-ea9f6bce383cc9fbcdee28b5836109b1a6dba574.tar.gz u-boot-imx-ea9f6bce383cc9fbcdee28b5836109b1a6dba574.tar.bz2 | |
ppc4xx: Update 440EPx lwmon5 board support
- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc440.h')
| -rw-r--r-- | include/ppc440.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/ppc440.h b/include/ppc440.h index 93c10f1..38809f3 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -3354,6 +3354,19 @@ typedef struct { unsigned long pciClkSync; /* PCI clock is synchronous */ } PPC440_SYS_INFO; +static inline u32 get_mcsr(void) +{ + u32 val; + + asm volatile("mfspr %0, 0x23c" : "=r" (val) :); + return val; +} + +static inline void set_mcsr(u32 val) +{ + asm volatile("mtspr 0x23c, %0" : "=r" (val) :); +} + #endif /* _ASMLANGUAGE */ #define RESET_VECTOR 0xfffffffc |