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| author | Tom Rini <trini@ti.com> | 2014-06-08 07:58:41 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-06-08 07:58:41 -0400 |
| commit | 55e8250bd3cfd996d1caa04f520160a89ec04754 (patch) | |
| tree | 64060c77eb5467f9a4c5ee421978db49d1a48ad3 /include/power/tps65218.h | |
| parent | 3e1fa221f94b7ae3389d166882b77f1da5895f22 (diff) | |
| parent | 5ed28948a3ffe6c735386e59c132989869beaa3e (diff) | |
| download | u-boot-imx-55e8250bd3cfd996d1caa04f520160a89ec04754.zip u-boot-imx-55e8250bd3cfd996d1caa04f520160a89ec04754.tar.gz u-boot-imx-55e8250bd3cfd996d1caa04f520160a89ec04754.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'include/power/tps65218.h')
| -rw-r--r-- | include/power/tps65218.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/include/power/tps65218.h b/include/power/tps65218.h new file mode 100644 index 0000000..67aa2f8 --- /dev/null +++ b/include/power/tps65218.h @@ -0,0 +1,63 @@ +/* + * (C) Copyright 2014 + * Texas Instruments, <www.ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __POWER_TPS65218_H__ +#define __POWER_TPS65218_H__ + +/* I2C chip address */ +#define TPS65218_CHIP_PM 0x24 + +/* Registers */ +enum { + TPS65218_CHIPID = 0x00, + TPS65218_INT1, + TPS65218_INT2, + TPS65218_INT_MASK1, + TPS65218_INT_MASK2, + TPS65218_STATUS, + TPS65218_CONTROL, + TPS65218_FLAG, + TPS65218_PASSWORD = 0x10, + TPS65218_ENABLE1, + TPS65218_ENABLE2, + TPS65218_CONFIG1, + TPS65218_CONFIG2, + TPS65218_CONFIG3, + TPS65218_DCDC1, + TPS65218_DCDC2, + TPS65218_DCDC3, + TPS65218_DCDC4, + TPS65218_SLEW, + TPS65218_LDO1, + TPS65218_SEQ1 = 0x20, + TPS65218_SEQ2, + TPS65218_SEQ3, + TPS65218_SEQ4, + TPS65218_SEQ5, + TPS65218_SEQ6, + TPS65218_SEQ7, + TPS65218_PMIC_NUM_OF_REGS, +}; + +#define TPS65218_PROT_LEVEL_NONE 0x00 +#define TPS65218_PROT_LEVEL_1 0x01 +#define TPS65218_PROT_LEVEL_2 0x02 + +#define TPS65218_PASSWORD_LOCK_FOR_WRITE 0x00 +#define TPS65218_PASSWORD_UNLOCK 0x7D + +#define TPS65218_DCDC_GO 0x80 + +#define TPS65218_MASK_ALL_BITS 0xFF + +#define TPS65218_DCDC_VOLT_SEL_1100MV 0x19 +#define TPS65218_DCDC_VOLT_SEL_1330MV 0x30 + +int tps65218_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val, + uchar mask); +int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel); +#endif /* __POWER_TPS65218_H__ */ |