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authorMark Jackson <mpfj-list@mimc.co.uk>2013-02-21 02:49:38 +0000
committerTom Rini <trini@ti.com>2013-03-22 10:57:00 -0400
commit296de3bbec3aa7d9103a1fee121fbad3a97d3133 (patch)
tree0e7091b45f48d3be403e5f4217f145451d1343f3 /include/physmem.h
parentfc33705e66cc2c753026f04f92555ad00b709f11 (diff)
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Initialise correct GPMC WAITx irq for AM33xx
Currently WAIT0 irq is reset and then WAIT1 irq is enabled. Fix it such that WAIT0 irq is enabled instead. Signed-off-by: Mark Jackson <mpfj@newflow.co.uk> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
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