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author | Mark Jackson <mpfj-list@mimc.co.uk> | 2013-02-21 02:49:38 +0000 |
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committer | Tom Rini <trini@ti.com> | 2013-03-22 10:57:00 -0400 |
commit | 296de3bbec3aa7d9103a1fee121fbad3a97d3133 (patch) | |
tree | 0e7091b45f48d3be403e5f4217f145451d1343f3 /include/physmem.h | |
parent | fc33705e66cc2c753026f04f92555ad00b709f11 (diff) | |
download | u-boot-imx-296de3bbec3aa7d9103a1fee121fbad3a97d3133.zip u-boot-imx-296de3bbec3aa7d9103a1fee121fbad3a97d3133.tar.gz u-boot-imx-296de3bbec3aa7d9103a1fee121fbad3a97d3133.tar.bz2 |
Initialise correct GPMC WAITx irq for AM33xx
Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
Fix it such that WAIT0 irq is enabled instead.
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Diffstat (limited to 'include/physmem.h')
0 files changed, 0 insertions, 0 deletions