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authorPaul Burton <paul.burton@imgtec.com>2013-11-08 11:18:50 +0000
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2013-11-09 17:21:01 +0100
commitbaf37f06c5cc51d2b9d71a2c83d5d92de60203a9 (patch)
tree7ad3945d47de4c1b5a7a1594b45f3b623a46df8c /include/pci_msc01.h
parenta257f6263b51321ecacc69ac1effbcbe2158fe15 (diff)
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malta: support for coreFPGA6 boards
This patch adds support for running on Malta boards using coreFPGA6 core cards, including support for the msc01 system controller used with them. The system controller is detected at runtime allowing one U-boot binary to run on a Malta with either. Due to the PCI I/O base differing between Maltas using gt64120 & msc01 system controllers, the UART setup is modified slightly. A second UART is added so that there is one pointing at the correct address for each system controller. The Malta board then defines its own default_serial_console function to select the correct one at runtime. The incorrect UART will simply not function. Tested on: - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both with and without an L2 cache. - QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'include/pci_msc01.h')
-rw-r--r--include/pci_msc01.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/include/pci_msc01.h b/include/pci_msc01.h
new file mode 100644
index 0000000..54945a7
--- /dev/null
+++ b/include/pci_msc01.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2013 Imagination Technologies
+ * Author: Paul Burton <paul.burton@imgtec.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __PCI_MSC01_H__
+#define __PCI_MSC01_H__
+
+extern void msc01_pci_init(void *base, unsigned long sys_bus,
+ unsigned long sys_phys, unsigned long sys_size,
+ unsigned long mem_bus, unsigned long mem_phys,
+ unsigned long mem_size, unsigned long io_bus,
+ unsigned long io_phys, unsigned long io_size);
+
+#endif /* __PCI_MSC01_H__ */