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authorWolfgang Denk <wd@pollux.(none)>2005-08-02 14:43:57 +0200
committerWolfgang Denk <wd@pollux.(none)>2005-08-02 14:43:57 +0200
commit7d939f89471d05ee40764156dd7147bca148c068 (patch)
treed486d08a91b344617454ee501678f184595d6ba3 /include/pci.h
parent0f18cb6eef469688a1c57647e486c1341c045b9f (diff)
parent7770ce47e4904b295632cae95f24fa6f62eb9e32 (diff)
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Merge with /home/sr/git/u-boot
Diffstat (limited to 'include/pci.h')
-rw-r--r--include/pci.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/pci.h b/include/pci.h
index 458be23..8f19997 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -160,6 +160,21 @@
#define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */
#define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary interface */
+/* From 440ep */
+#define PCI_ERREN 0x48 /* Error Enable */
+#define PCI_ERRSTS 0x49 /* Error Status */
+#define PCI_BRDGOPT1 0x4A /* PCI Bridge Options 1 */
+#define PCI_PLBSESR0 0x4C /* PCI PLB Slave Error Syndrome 0 */
+#define PCI_PLBSESR1 0x50 /* PCI PLB Slave Error Syndrome 1 */
+#define PCI_PLBSEAR 0x54 /* PCI PLB Slave Error Address */
+#define PCI_CAPID 0x58 /* Capability Identifier */
+#define PCI_NEXTITEMPTR 0x59 /* Next Item Pointer */
+#define PCI_PMC 0x5A /* Power Management Capabilities */
+#define PCI_PMCSR 0x5C /* Power Management Control Status */
+#define PCI_PMCSRBSE 0x5E /* PMCSR PCI to PCI Bridge Support Extensions */
+#define PCI_BRDGOPT2 0x60 /* PCI Bridge Options 2 */
+#define PCI_PMSCRR 0x64 /* Power Management State Change Request Re. */
+
/* Header type 2 (CardBus bridges) */
#define PCI_CB_CAPABILITY_LIST 0x14
/* 0x15 reserved */