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author | Bin Meng <bmeng.cn@gmail.com> | 2016-02-01 01:40:43 -0800 |
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committer | Bin Meng <bmeng.cn@gmail.com> | 2016-02-05 12:47:21 +0800 |
commit | 384980c687ca38c028bdf40f59a38b3f52105884 (patch) | |
tree | e9f70955a43852369d64b01eafb91c09e6b4e848 /include/pch.h | |
parent | 3e389d8ba666c5c2ad42021c2087630c1e412954 (diff) | |
download | u-boot-imx-384980c687ca38c028bdf40f59a38b3f52105884.zip u-boot-imx-384980c687ca38c028bdf40f59a38b3f52105884.tar.gz u-boot-imx-384980c687ca38c028bdf40f59a38b3f52105884.tar.bz2 |
dm: pch: Add get_gpio_base op
x86 GPIO registers are accessed via I/O port whose base address is
configured in a PCI configuration register on the PCH device. Add
an op get_gpio_base to get the GPIO base address from PCH.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/pch.h')
-rw-r--r-- | include/pch.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/pch.h b/include/pch.h index c04cfa3..b378865 100644 --- a/include/pch.h +++ b/include/pch.h @@ -32,6 +32,15 @@ struct pch_ops { * @return 0 on success, -ENOSYS if not implemented */ int (*set_spi_protect)(struct udevice *dev, bool protect); + + /** + * get_gpio_base() - get the address of GPIO base + * + * @dev: PCH device to check + * @gbasep: Returns address of GPIO base if available, else 0 + * @return 0 if OK, -ve on error (e.g. there is no GPIO base) + */ + int (*get_gpio_base)(struct udevice *dev, u32 *gbasep); }; #define pch_get_ops(dev) ((struct pch_ops *)(dev)->driver->ops) @@ -55,4 +64,13 @@ int pch_get_spi_base(struct udevice *dev, ulong *sbasep); */ int pch_set_spi_protect(struct udevice *dev, bool protect); +/** + * pch_get_gpio_base() - get the address of GPIO base + * + * @dev: PCH device to check + * @gbasep: Returns address of GPIO base if available, else 0 + * @return 0 if OK, -ve on error (e.g. there is no GPIO base) + */ +int pch_get_gpio_base(struct udevice *dev, u32 *gbasep); + #endif |