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author | Stefan Roese <sr@denx.de> | 2008-06-03 20:19:08 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2008-06-03 20:19:08 +0200 |
commit | 10a3367955bc2033b288915f8f10d0e507fe2fa1 (patch) | |
tree | c3ac82364df83db5d5cb963c64b863b77a20445c /include/ns9750_sys.h | |
parent | 97f7d27c8ecf34879d6b747c10fa9a18c02a4cc0 (diff) | |
parent | 1f1554841a4c8e069d331176f0c3059fb2bb8280 (diff) | |
download | u-boot-imx-10a3367955bc2033b288915f8f10d0e507fe2fa1.zip u-boot-imx-10a3367955bc2033b288915f8f10d0e507fe2fa1.tar.gz u-boot-imx-10a3367955bc2033b288915f8f10d0e507fe2fa1.tar.bz2 |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'include/ns9750_sys.h')
-rw-r--r-- | include/ns9750_sys.h | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/include/ns9750_sys.h b/include/ns9750_sys.h index c563cad..f1dc2b2 100644 --- a/include/ns9750_sys.h +++ b/include/ns9750_sys.h @@ -38,9 +38,9 @@ #define NS9750_SYS_AHB_GEN (0x0000) #define NS9750_SYS_BRC_BASE (0x0004) #define NS9750_SYS_AHB_TIMEOUT (0x0014) -#define NS9750_SYS_AHB_ERROR1 (0x0018) -#define NS9750_SYS_AHB_ERROR2 (0x001C) -#define NS9750_SYS_AHB_MON (0x0020) +#define NS9750_SYS_AHB_ERROR1 (0x0018) +#define NS9750_SYS_AHB_ERROR2 (0x001C) +#define NS9750_SYS_AHB_MON (0x0020) #define NS9750_SYS_TIMER_COUNT_BASE (0x0044) #define NS9750_SYS_TIMER_READ_BASE (0x0084) #define NS9750_SYS_INT_VEC_ADR_BASE (0x00C4) @@ -120,27 +120,27 @@ /* need to be n*8bit to Int Level */ #define NS9750_SYS_INT_CFG_IE (0x00000080) -#define NS9750_SYS_INT_CFG_IT (0x00000020) +#define NS9750_SYS_INT_CFG_IT (0x00000020) #define NS9750_SYS_INT_CFG_IAD_MA (0x0000001F) -#define NS9750_SYS_TIMER_INT_STAT_MA (0x0000FFFF) +#define NS9750_SYS_TIMER_INT_STAT_MA (0x0000FFFF) #define NS9750_SYS_SW_WDOG_CFG_SWWE (0x00000080) #define NS9750_SYS_SW_WDOG_CFG_SWWI (0x00000020) #define NS9750_SYS_SW_WDOG_CFG_SWWIC (0x00000010) #define NS9750_SYS_SW_WDOG_CFG_SWTCS_MA (0x00000007) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_2 (0x00000000) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_4 (0x00000001) -#define NS9750_SYS_SW_WDOG_CFG_SWTCS_8 (0x00000002) +#define NS9750_SYS_SW_WDOG_CFG_SWTCS_2 (0x00000000) +#define NS9750_SYS_SW_WDOG_CFG_SWTCS_4 (0x00000001) +#define NS9750_SYS_SW_WDOG_CFG_SWTCS_8 (0x00000002) #define NS9750_SYS_SW_WDOG_CFG_SWTCS_16 (0x00000003) #define NS9750_SYS_SW_WDOG_CFG_SWTCS_32 (0x00000004) #define NS9750_SYS_SW_WDOG_CFG_SWTCS_64 (0x00000005) #define NS9750_SYS_CLOCK_LPCS_MA (0x00000380) -#define NS9750_SYS_CLOCK_LPCS_1 (0x00000000) -#define NS9750_SYS_CLOCK_LPCS_2 (0x00000080) -#define NS9750_SYS_CLOCK_LPCS_4 (0x00000100) -#define NS9750_SYS_CLOCK_LPCS_8 (0x00000180) +#define NS9750_SYS_CLOCK_LPCS_1 (0x00000000) +#define NS9750_SYS_CLOCK_LPCS_2 (0x00000080) +#define NS9750_SYS_CLOCK_LPCS_4 (0x00000100) +#define NS9750_SYS_CLOCK_LPCS_8 (0x00000180) #define NS9750_SYS_CLOCK_LPCS_EXT (0x00000200) #define NS9750_SYS_CLOCK_BBC (0x00000040) #define NS9750_SYS_CLOCK_LCC (0x00000020) @@ -185,22 +185,22 @@ #define NS9750_SYS_PLL_CPCC_MA (0x00000060) #define NS9750_SYS_PLL_NDSW_MA (0x0000001F) -#define NS9750_SYS_ACT_INT_STAT_MA (0x0000FFFF) +#define NS9750_SYS_ACT_INT_STAT_MA (0x0000FFFF) #define NS9750_SYS_TIMER_CTRL_TEN (0x00008000) #define NS9750_SYS_TIMER_CTRL_INTC (0x00000200) #define NS9750_SYS_TIMER_CTRL_TLCS_MA (0x000001C0) -#define NS9750_SYS_TIMER_CTRL_TLCS_1 (0x00000000) -#define NS9750_SYS_TIMER_CTRL_TLCS_2 (0x00000040) -#define NS9750_SYS_TIMER_CTRL_TLCS_4 (0x00000080) -#define NS9750_SYS_TIMER_CTRL_TLCS_8 (0x000000C0) +#define NS9750_SYS_TIMER_CTRL_TLCS_1 (0x00000000) +#define NS9750_SYS_TIMER_CTRL_TLCS_2 (0x00000040) +#define NS9750_SYS_TIMER_CTRL_TLCS_4 (0x00000080) +#define NS9750_SYS_TIMER_CTRL_TLCS_8 (0x000000C0) #define NS9750_SYS_TIMER_CTRL_TLCS_16 (0x00000100) #define NS9750_SYS_TIMER_CTRL_TLCS_32 (0x00000140) #define NS9750_SYS_TIMER_CTRL_TLCS_64 (0x00000180) #define NS9750_SYS_TIMER_CTRL_TLCS_EXT (0x000001C0) #define NS9750_SYS_TIMER_CTRL_TM_MA (0x00000030) -#define NS9750_SYS_TIMER_CTRL_TM_INT (0x00000000) -#define NS9750_SYS_TIMER_CTRL_TM_LOW (0x00000010) +#define NS9750_SYS_TIMER_CTRL_TM_INT (0x00000000) +#define NS9750_SYS_TIMER_CTRL_TM_LOW (0x00000010) #define NS9750_SYS_TIMER_CTRL_TM_HIGH (0x00000020) #define NS9750_SYS_TIMER_CTRL_INTS (0x00000008) #define NS9750_SYS_TIMER_CTRL_UDS (0x00000004) |