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| author | Peter Tyser <ptyser@xes-inc.com> | 2009-02-06 14:30:40 -0600 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2009-02-16 18:05:57 -0600 |
| commit | a1c8a719262151f97119e76166043ee3da3f97b2 (patch) | |
| tree | 5a7273bb80bef8a798cda6ecb25ecfd5eed9acdb /include/mpc8xx_irq.h | |
| parent | 22c00f8d7d454d77e759df58415d2d3f3d7e154c (diff) | |
| download | u-boot-imx-a1c8a719262151f97119e76166043ee3da3f97b2.zip u-boot-imx-a1c8a719262151f97119e76166043ee3da3f97b2.tar.gz u-boot-imx-a1c8a719262151f97119e76166043ee3da3f97b2.tar.bz2 | |
86xx: Update CPU info output on bootup
- Update style of 86xx CPU information on boot to more closely
match 85xx boards
- Fix detection of 8641/8641D
- Use strmhz() to display frequencies
- Display L1 information
- Display L2 cache size
- Fixed CPU/SVR version output
== Before ==
Freescale PowerPC
CPU:
Core: E600 Core 0, Version: 0.2, (0x80040202)
System: Unknown, Version: 2.1, (0x80900121)
Clocks: CPU:1066 MHz, MPX: 533 MHz, DDR: 266 MHz, LBC: 133 MHz
L2: Enabled
Board: X-ES XPedite5170 3U VPX SBC
== After ==
CPU: 8641D, Version: 2.1, (0x80900121)
Core: E600 Core 0, Version: 2.2, (0x80040202)
Clock Configuration:
CPU:1066.667 MHz, MPX:533.333 MHz
DDR:266.667 MHz (533.333 MT/s data rate), LBC:133.333 MHz
L1: D-cache 32 KB enabled
I-cache 32 KB enabled
L2: 512 KB enabled
Board: X-ES XPedite5170 3U VPX SBC
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Diffstat (limited to 'include/mpc8xx_irq.h')
0 files changed, 0 insertions, 0 deletions