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authorTimur Tabi <timur@freescale.com>2007-07-03 13:04:34 -0500
committerKim Phillips <kim.phillips@freescale.com>2007-08-10 01:12:03 -0500
commitdf33f6b4d6d63693dd9200808b242de1b86cb8e8 (patch)
tree670295262e8d55ebc544e2e13ccde39ec300aed0 /include/mpc83xx.h
parent9546266999f0b9b51372636614211b88d90f0f25 (diff)
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Update SCCR programming in cpu_init_f() to support all 83xx processors
Update the cpu_init_f() function in cpu/mpc83xx/cpu_init.c to program the bitfields for all 83xx processors. The code to update some bitfields was compiled only on some processors. Now, the bitfields are programmed as long as the corresponding CFG_SCCR option is defined in the board header file. This means that the board header file should not define any CFG_SCCR macros for bitfields that don't exist on that processor, otherwise the SCCR will be programmed incorrectly. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/mpc83xx.h')
-rw-r--r--include/mpc83xx.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 01df06b..829dbf9 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -602,7 +602,9 @@
#define SCCR_TSEC1CM_3 0xC0000000
#define SCCR_TSEC1ON 0x20000000
+#define SCCR_TSEC1ON_SHIFT 29
#define SCCR_TSEC2ON 0x10000000
+#define SCCR_TSEC2ON_SHIFT 28
#endif