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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /include/mpc5xxx.h | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/mpc5xxx.h')
-rw-r--r-- | include/mpc5xxx.h | 108 |
1 files changed, 54 insertions, 54 deletions
diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h index 0f5bee5..3a32821 100644 --- a/include/mpc5xxx.h +++ b/include/mpc5xxx.h @@ -52,75 +52,75 @@ /* Internal memory map */ -#define MPC5XXX_CS0_START (CFG_MBAR + 0x0004) -#define MPC5XXX_CS0_STOP (CFG_MBAR + 0x0008) -#define MPC5XXX_CS1_START (CFG_MBAR + 0x000c) -#define MPC5XXX_CS1_STOP (CFG_MBAR + 0x0010) -#define MPC5XXX_CS2_START (CFG_MBAR + 0x0014) -#define MPC5XXX_CS2_STOP (CFG_MBAR + 0x0018) -#define MPC5XXX_CS3_START (CFG_MBAR + 0x001c) -#define MPC5XXX_CS3_STOP (CFG_MBAR + 0x0020) -#define MPC5XXX_CS4_START (CFG_MBAR + 0x0024) -#define MPC5XXX_CS4_STOP (CFG_MBAR + 0x0028) -#define MPC5XXX_CS5_START (CFG_MBAR + 0x002c) -#define MPC5XXX_CS5_STOP (CFG_MBAR + 0x0030) -#define MPC5XXX_BOOTCS_START (CFG_MBAR + 0x004c) -#define MPC5XXX_BOOTCS_STOP (CFG_MBAR + 0x0050) -#define MPC5XXX_ADDECR (CFG_MBAR + 0x0054) +#define MPC5XXX_CS0_START (CONFIG_SYS_MBAR + 0x0004) +#define MPC5XXX_CS0_STOP (CONFIG_SYS_MBAR + 0x0008) +#define MPC5XXX_CS1_START (CONFIG_SYS_MBAR + 0x000c) +#define MPC5XXX_CS1_STOP (CONFIG_SYS_MBAR + 0x0010) +#define MPC5XXX_CS2_START (CONFIG_SYS_MBAR + 0x0014) +#define MPC5XXX_CS2_STOP (CONFIG_SYS_MBAR + 0x0018) +#define MPC5XXX_CS3_START (CONFIG_SYS_MBAR + 0x001c) +#define MPC5XXX_CS3_STOP (CONFIG_SYS_MBAR + 0x0020) +#define MPC5XXX_CS4_START (CONFIG_SYS_MBAR + 0x0024) +#define MPC5XXX_CS4_STOP (CONFIG_SYS_MBAR + 0x0028) +#define MPC5XXX_CS5_START (CONFIG_SYS_MBAR + 0x002c) +#define MPC5XXX_CS5_STOP (CONFIG_SYS_MBAR + 0x0030) +#define MPC5XXX_BOOTCS_START (CONFIG_SYS_MBAR + 0x004c) +#define MPC5XXX_BOOTCS_STOP (CONFIG_SYS_MBAR + 0x0050) +#define MPC5XXX_ADDECR (CONFIG_SYS_MBAR + 0x0054) #if defined(CONFIG_MGT5100) -#define MPC5XXX_SDRAM_START (CFG_MBAR + 0x0034) -#define MPC5XXX_SDRAM_STOP (CFG_MBAR + 0x0038) -#define MPC5XXX_PCI1_START (CFG_MBAR + 0x003c) -#define MPC5XXX_PCI1_STOP (CFG_MBAR + 0x0040) -#define MPC5XXX_PCI2_START (CFG_MBAR + 0x0044) -#define MPC5XXX_PCI2_STOP (CFG_MBAR + 0x0048) +#define MPC5XXX_SDRAM_START (CONFIG_SYS_MBAR + 0x0034) +#define MPC5XXX_SDRAM_STOP (CONFIG_SYS_MBAR + 0x0038) +#define MPC5XXX_PCI1_START (CONFIG_SYS_MBAR + 0x003c) +#define MPC5XXX_PCI1_STOP (CONFIG_SYS_MBAR + 0x0040) +#define MPC5XXX_PCI2_START (CONFIG_SYS_MBAR + 0x0044) +#define MPC5XXX_PCI2_STOP (CONFIG_SYS_MBAR + 0x0048) #elif defined(CONFIG_MPC5200) -#define MPC5XXX_CS6_START (CFG_MBAR + 0x0058) -#define MPC5XXX_CS6_STOP (CFG_MBAR + 0x005c) -#define MPC5XXX_CS7_START (CFG_MBAR + 0x0060) -#define MPC5XXX_CS7_STOP (CFG_MBAR + 0x0064) -#define MPC5XXX_SDRAM_CS0CFG (CFG_MBAR + 0x0034) -#define MPC5XXX_SDRAM_CS1CFG (CFG_MBAR + 0x0038) +#define MPC5XXX_CS6_START (CONFIG_SYS_MBAR + 0x0058) +#define MPC5XXX_CS6_STOP (CONFIG_SYS_MBAR + 0x005c) +#define MPC5XXX_CS7_START (CONFIG_SYS_MBAR + 0x0060) +#define MPC5XXX_CS7_STOP (CONFIG_SYS_MBAR + 0x0064) +#define MPC5XXX_SDRAM_CS0CFG (CONFIG_SYS_MBAR + 0x0034) +#define MPC5XXX_SDRAM_CS1CFG (CONFIG_SYS_MBAR + 0x0038) #endif -#define MPC5XXX_SDRAM (CFG_MBAR + 0x0100) -#define MPC5XXX_CDM (CFG_MBAR + 0x0200) -#define MPC5XXX_LPB (CFG_MBAR + 0x0300) -#define MPC5XXX_ICTL (CFG_MBAR + 0x0500) -#define MPC5XXX_GPT (CFG_MBAR + 0x0600) -#define MPC5XXX_GPIO (CFG_MBAR + 0x0b00) -#define MPC5XXX_WU_GPIO (CFG_MBAR + 0x0c00) -#define MPC5XXX_PCI (CFG_MBAR + 0x0d00) -#define MPC5XXX_SPI (CFG_MBAR + 0x0f00) -#define MPC5XXX_USB (CFG_MBAR + 0x1000) -#define MPC5XXX_SDMA (CFG_MBAR + 0x1200) -#define MPC5XXX_XLBARB (CFG_MBAR + 0x1f00) +#define MPC5XXX_SDRAM (CONFIG_SYS_MBAR + 0x0100) +#define MPC5XXX_CDM (CONFIG_SYS_MBAR + 0x0200) +#define MPC5XXX_LPB (CONFIG_SYS_MBAR + 0x0300) +#define MPC5XXX_ICTL (CONFIG_SYS_MBAR + 0x0500) +#define MPC5XXX_GPT (CONFIG_SYS_MBAR + 0x0600) +#define MPC5XXX_GPIO (CONFIG_SYS_MBAR + 0x0b00) +#define MPC5XXX_WU_GPIO (CONFIG_SYS_MBAR + 0x0c00) +#define MPC5XXX_PCI (CONFIG_SYS_MBAR + 0x0d00) +#define MPC5XXX_SPI (CONFIG_SYS_MBAR + 0x0f00) +#define MPC5XXX_USB (CONFIG_SYS_MBAR + 0x1000) +#define MPC5XXX_SDMA (CONFIG_SYS_MBAR + 0x1200) +#define MPC5XXX_XLBARB (CONFIG_SYS_MBAR + 0x1f00) #if defined(CONFIG_MGT5100) -#define MPC5XXX_PSC1 (CFG_MBAR + 0x2000) -#define MPC5XXX_PSC2 (CFG_MBAR + 0x2400) -#define MPC5XXX_PSC3 (CFG_MBAR + 0x2800) +#define MPC5XXX_PSC1 (CONFIG_SYS_MBAR + 0x2000) +#define MPC5XXX_PSC2 (CONFIG_SYS_MBAR + 0x2400) +#define MPC5XXX_PSC3 (CONFIG_SYS_MBAR + 0x2800) #elif defined(CONFIG_MPC5200) -#define MPC5XXX_PSC1 (CFG_MBAR + 0x2000) -#define MPC5XXX_PSC2 (CFG_MBAR + 0x2200) -#define MPC5XXX_PSC3 (CFG_MBAR + 0x2400) -#define MPC5XXX_PSC4 (CFG_MBAR + 0x2600) -#define MPC5XXX_PSC5 (CFG_MBAR + 0x2800) -#define MPC5XXX_PSC6 (CFG_MBAR + 0x2c00) +#define MPC5XXX_PSC1 (CONFIG_SYS_MBAR + 0x2000) +#define MPC5XXX_PSC2 (CONFIG_SYS_MBAR + 0x2200) +#define MPC5XXX_PSC3 (CONFIG_SYS_MBAR + 0x2400) +#define MPC5XXX_PSC4 (CONFIG_SYS_MBAR + 0x2600) +#define MPC5XXX_PSC5 (CONFIG_SYS_MBAR + 0x2800) +#define MPC5XXX_PSC6 (CONFIG_SYS_MBAR + 0x2c00) #endif -#define MPC5XXX_FEC (CFG_MBAR + 0x3000) -#define MPC5XXX_ATA (CFG_MBAR + 0x3A00) +#define MPC5XXX_FEC (CONFIG_SYS_MBAR + 0x3000) +#define MPC5XXX_ATA (CONFIG_SYS_MBAR + 0x3A00) -#define MPC5XXX_I2C1 (CFG_MBAR + 0x3D00) -#define MPC5XXX_I2C2 (CFG_MBAR + 0x3D40) +#define MPC5XXX_I2C1 (CONFIG_SYS_MBAR + 0x3D00) +#define MPC5XXX_I2C2 (CONFIG_SYS_MBAR + 0x3D40) #if defined(CONFIG_MGT5100) -#define MPC5XXX_SRAM (CFG_MBAR + 0x4000) +#define MPC5XXX_SRAM (CONFIG_SYS_MBAR + 0x4000) #define MPC5XXX_SRAM_SIZE (8*1024) #elif defined(CONFIG_MPC5200) -#define MPC5XXX_SRAM (CFG_MBAR + 0x8000) +#define MPC5XXX_SRAM (CONFIG_SYS_MBAR + 0x8000) #define MPC5XXX_SRAM_SIZE (16*1024) #endif |