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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-06-02 08:43:48 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-06-02 08:43:48 +0200
commitcc49da249cf2f380d2fed5571fad65ce6494fc95 (patch)
tree00bf437b6a370c0640d5fafd93780406d3531ebb /include/mmc.h
parent9637a1bb896efe392a58dd2772e2c3fcb646409d (diff)
parent567802bbd6bf1c809d37fef9244fc8a692244e73 (diff)
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Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Diffstat (limited to 'include/mmc.h')
-rw-r--r--include/mmc.h25
1 files changed, 13 insertions, 12 deletions
diff --git a/include/mmc.h b/include/mmc.h
index a3a100b..f46572e 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -32,15 +32,13 @@
#define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429)
#define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405)
-#define MMC_MODE_HS 0x001
-#define MMC_MODE_HS_52MHz 0x010
-#define MMC_MODE_4BIT 0x100
-#define MMC_MODE_8BIT 0x200
-#define MMC_MODE_SPI 0x400
-#define MMC_MODE_HC 0x800
-
-#define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT)
-#define MMC_MODE_WIDTH_BITS_SHIFT 8
+#define MMC_MODE_HS (1 << 0)
+#define MMC_MODE_HS_52MHz (1 << 1)
+#define MMC_MODE_4BIT (1 << 2)
+#define MMC_MODE_8BIT (1 << 3)
+#define MMC_MODE_SPI (1 << 4)
+#define MMC_MODE_HC (1 << 5)
+#define MMC_MODE_DDR_52MHz (1 << 6)
#define SD_DATA_4BIT 0x00040000
@@ -100,9 +98,6 @@
#define SD_HIGHSPEED_BUSY 0x00020000
#define SD_HIGHSPEED_SUPPORTED 0x00020000
-#define MMC_HS_TIMING 0x00000100
-#define MMC_HS_52MHZ 0x2
-
#define OCR_BUSY 0x80000000
#define OCR_HCS 0x40000000
#define OCR_VOLTAGE_MASK 0x007FFF80
@@ -178,10 +173,16 @@
#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
+#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
+#define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
+#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
+ | EXT_CSD_CARD_TYPE_DDR_1_2V)
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
+#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
+#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)