diff options
author | Mike Frysinger <vapier@gentoo.org> | 2010-12-23 15:40:12 -0500 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2011-01-09 18:06:50 +0100 |
commit | 8ef583a0351590a91394499eb5ca2ab8a703d959 (patch) | |
tree | 36dafbd4bdd7e46130aec04bbc0dbfe26e896d9f /include/miiphy.h | |
parent | 4ffeab2cc00b61bc4616d9e3c25d33937b0feb34 (diff) | |
download | u-boot-imx-8ef583a0351590a91394499eb5ca2ab8a703d959.zip u-boot-imx-8ef583a0351590a91394499eb5ca2ab8a703d959.tar.gz u-boot-imx-8ef583a0351590a91394499eb5ca2ab8a703d959.tar.bz2 |
miiphy: convert to linux/mii.h
The include/miiphy.h header duplicates a lot of things from linux/mii.h.
So punt all the things that overlap to keep the API simple and to make
merging between U-Boot and Linux simpler.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'include/miiphy.h')
-rw-r--r-- | include/miiphy.h | 89 |
1 files changed, 8 insertions, 81 deletions
diff --git a/include/miiphy.h b/include/miiphy.h index 2f7d915..42dc127 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -34,6 +34,7 @@ #ifndef _miiphy_h_ #define _miiphy_h_ +#include <linux/mii.h> #include <net.h> int miiphy_read (const char *devname, unsigned char addr, unsigned char reg, @@ -100,89 +101,17 @@ int bb_miiphy_write (const char *devname, unsigned char addr, #define FULL 44 /* phy register offsets */ -#define PHY_BMCR 0x00 -#define PHY_BMSR 0x01 -#define PHY_PHYIDR1 0x02 -#define PHY_PHYIDR2 0x03 -#define PHY_ANAR 0x04 -#define PHY_ANLPAR 0x05 -#define PHY_ANER 0x06 -#define PHY_ANNPTR 0x07 -#define PHY_ANLPNP 0x08 -#define PHY_1000BTCR 0x09 -#define PHY_1000BTSR 0x0A -#define PHY_EXSR 0x0F -#define PHY_PHYSTS 0x10 -#define PHY_MIPSCR 0x11 -#define PHY_MIPGSR 0x12 -#define PHY_DCR 0x13 -#define PHY_FCSCR 0x14 -#define PHY_RECR 0x15 -#define PHY_PCSR 0x16 -#define PHY_LBR 0x17 -#define PHY_10BTSCR 0x18 -#define PHY_PHYCTRL 0x19 - -/* PHY BMCR */ -#define PHY_BMCR_RESET 0x8000 -#define PHY_BMCR_LOOP 0x4000 -#define PHY_BMCR_100MB 0x2000 -#define PHY_BMCR_AUTON 0x1000 -#define PHY_BMCR_POWD 0x0800 -#define PHY_BMCR_ISO 0x0400 -#define PHY_BMCR_RST_NEG 0x0200 -#define PHY_BMCR_DPLX 0x0100 -#define PHY_BMCR_COL_TST 0x0080 - -#define PHY_BMCR_SPEED_MASK 0x2040 -#define PHY_BMCR_1000_MBPS 0x0040 -#define PHY_BMCR_100_MBPS 0x2000 -#define PHY_BMCR_10_MBPS 0x0000 - -/* phy BMSR */ -#define PHY_BMSR_100T4 0x8000 -#define PHY_BMSR_100TXF 0x4000 -#define PHY_BMSR_100TXH 0x2000 -#define PHY_BMSR_10TF 0x1000 -#define PHY_BMSR_10TH 0x0800 -#define PHY_BMSR_EXT_STAT 0x0100 -#define PHY_BMSR_PRE_SUP 0x0040 -#define PHY_BMSR_AUTN_COMP 0x0020 -#define PHY_BMSR_RF 0x0010 -#define PHY_BMSR_AUTN_ABLE 0x0008 -#define PHY_BMSR_LS 0x0004 -#define PHY_BMSR_JD 0x0002 -#define PHY_BMSR_EXT 0x0001 - -/*phy ANLPAR */ -#define PHY_ANLPAR_NP 0x8000 -#define PHY_ANLPAR_ACK 0x4000 -#define PHY_ANLPAR_RF 0x2000 -#define PHY_ANLPAR_ASYMP 0x0800 -#define PHY_ANLPAR_PAUSE 0x0400 -#define PHY_ANLPAR_T4 0x0200 -#define PHY_ANLPAR_TXFD 0x0100 -#define PHY_ANLPAR_TX 0x0080 -#define PHY_ANLPAR_10FD 0x0040 -#define PHY_ANLPAR_10 0x0020 -#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */ -/* phy ANLPAR 1000BASE-X */ -#define PHY_X_ANLPAR_NP 0x8000 -#define PHY_X_ANLPAR_ACK 0x4000 -#define PHY_X_ANLPAR_RF_MASK 0x3000 -#define PHY_X_ANLPAR_PAUSE_MASK 0x0180 -#define PHY_X_ANLPAR_HD 0x0040 -#define PHY_X_ANLPAR_FD 0x0020 - -#define PHY_ANLPAR_PSB_MASK 0x001f +#define MII_MIPSCR 0x11 + +/* MII_LPA */ #define PHY_ANLPAR_PSB_802_3 0x0001 #define PHY_ANLPAR_PSB_802_9 0x0002 -/* phy 1000BTCR */ +/* MII_CTRL1000 masks */ #define PHY_1000BTCR_1000FD 0x0200 #define PHY_1000BTCR_1000HD 0x0100 -/* phy 1000BTSR */ +/* MII_STAT1000 masks */ #define PHY_1000BTSR_MSCF 0x8000 #define PHY_1000BTSR_MSCR 0x4000 #define PHY_1000BTSR_LRS 0x2000 @@ -191,9 +120,7 @@ int bb_miiphy_write (const char *devname, unsigned char addr, #define PHY_1000BTSR_1000HD 0x0400 /* phy EXSR */ -#define PHY_EXSR_1000XF 0x8000 -#define PHY_EXSR_1000XH 0x4000 -#define PHY_EXSR_1000TF 0x2000 -#define PHY_EXSR_1000TH 0x1000 +#define ESTATUS_1000XF 0x8000 +#define ESTATUS_1000XH 0x4000 #endif |