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authorShaohui Xie <Shaohui.Xie@freescale.com>2014-04-21 11:21:03 +0800
committerYork Sun <yorksun@freescale.com>2014-04-22 17:58:53 -0700
commitcb753850e8af5a224d7c08b4fd1d258082d3bbd5 (patch)
tree75ec13dd68f7e489cc2b1b9f76bfcd647d26ec58 /include/malloc.h
parentb33bd8cd4b7627f64698c6f26739e0c4597bdfbc (diff)
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powerpc/t4240: updated RCW and PBI for rev2.0
Updated the RCW for rev2.0 which uses new frequency settings as below: Clock Configuration: CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz, CPU3:1666.667 MHz, CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz, CPU7:1666.667 MHz, CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz, CPU11:1666.667MHz, CCB:733.333 MHz, DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:183.333 MHz FMAN1: 733.333 MHz FMAN2: 733.333 MHz QMAN: 366.667 MHz PME: 533.333 MHz Remove workaround of IFC bus speed and SERDES A-006031 of rev1.0. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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