Merge commit 'wd/master'

1 files changed, 64 insertions, 64 deletions

diff --git a/include/lxt971a.h b/include/lxt971a.h
index 2b5b6d4..f76c336 100644
--- a/include/lxt971a.h
+++ b/include/lxt971a.h
@@ -30,75 +30,75 @@
 #define __LXT971A_H__
 
 /* PHY definitions (LXT971A) [2] */
-#define PHY_COMMON_CTRL    	 	(0x00)
-#define PHY_COMMON_STAT    	 	(0x01)
-#define PHY_COMMON_ID1    	 	(0x02)
-#define PHY_COMMON_ID2           	(0x03)
-#define PHY_COMMON_AUTO_ADV      	(0x04)
-#define PHY_COMMON_AUTO_LNKB     	(0x05)
-#define PHY_COMMON_AUTO_EXP      	(0x06)
-#define PHY_COMMON_AUTO_NEXT     	(0x07)
-#define PHY_COMMON_AUTO_LNKN     	(0x08)
-#define PHY_LXT971_PORT_CFG      	(0x10)
-#define PHY_LXT971_STAT2         	(0x11)
-#define PHY_LXT971_INT_ENABLE    	(0x12)
-#define PHY_LXT971_INT_STATUS    	(0x13)
-#define PHY_LXT971_LED_CFG       	(0x14)
-#define PHY_LXT971_DIG_CFG       	(0x1A)
-#define PHY_LXT971_TX_CTRL       	(0x1E)
+#define PHY_COMMON_CTRL			(0x00)
+#define PHY_COMMON_STAT			(0x01)
+#define PHY_COMMON_ID1			(0x02)
+#define PHY_COMMON_ID2			(0x03)
+#define PHY_COMMON_AUTO_ADV		(0x04)
+#define PHY_COMMON_AUTO_LNKB		(0x05)
+#define PHY_COMMON_AUTO_EXP		(0x06)
+#define PHY_COMMON_AUTO_NEXT		(0x07)
+#define PHY_COMMON_AUTO_LNKN		(0x08)
+#define PHY_LXT971_PORT_CFG		(0x10)
+#define PHY_LXT971_STAT2		(0x11)
+#define PHY_LXT971_INT_ENABLE		(0x12)
+#define PHY_LXT971_INT_STATUS		(0x13)
+#define PHY_LXT971_LED_CFG		(0x14)
+#define PHY_LXT971_DIG_CFG		(0x1A)
+#define PHY_LXT971_TX_CTRL		(0x1E)
 
 /* CTRL PHY Control Register Bit Fields */
-#define PHY_COMMON_CTRL_RESET  	 	(0x8000)
-#define PHY_COMMON_CTRL_LOOPBACK 	(0x4000)
-#define PHY_COMMON_CTRL_SPD_MA   	(0x2040)
-#define PHY_COMMON_CTRL_SPD_10   	(0x0000)
-#define PHY_COMMON_CTRL_SPD_100  	(0x2000)
-#define PHY_COMMON_CTRL_SPD_1000 	(0x0040)
-#define PHY_COMMON_CTRL_SPD_RES  	(0x2040)
-#define PHY_COMMON_CTRL_AUTO_NEG 	(0x1000)
-#define PHY_COMMON_CTRL_POWER_DN 	(0x0800)
-#define PHY_COMMON_CTRL_ISOLATE	 	(0x0400)
-#define PHY_COMMON_CTRL_RES_AUTO 	(0x0200)
-#define PHY_COMMON_CTRL_DUPLEX	 	(0x0100)
-#define PHY_COMMON_CTRL_COL_TEST 	(0x0080)
-#define PHY_COMMON_CTRL_RES1     	(0x003F)
+#define PHY_COMMON_CTRL_RESET		(0x8000)
+#define PHY_COMMON_CTRL_LOOPBACK	(0x4000)
+#define PHY_COMMON_CTRL_SPD_MA		(0x2040)
+#define PHY_COMMON_CTRL_SPD_10		(0x0000)
+#define PHY_COMMON_CTRL_SPD_100		(0x2000)
+#define PHY_COMMON_CTRL_SPD_1000	(0x0040)
+#define PHY_COMMON_CTRL_SPD_RES		(0x2040)
+#define PHY_COMMON_CTRL_AUTO_NEG	(0x1000)
+#define PHY_COMMON_CTRL_POWER_DN	(0x0800)
+#define PHY_COMMON_CTRL_ISOLATE		(0x0400)
+#define PHY_COMMON_CTRL_RES_AUTO	(0x0200)
+#define PHY_COMMON_CTRL_DUPLEX		(0x0100)
+#define PHY_COMMON_CTRL_COL_TEST	(0x0080)
+#define PHY_COMMON_CTRL_RES1		(0x003F)
 
 /* STAT Status Register Bit Fields */
-#define PHY_COMMON_STAT_100BT4	 	(0x8000)
-#define PHY_COMMON_STAT_100BXFD	 	(0x4000)
-#define PHY_COMMON_STAT_100BXHD	 	(0x2000)
-#define PHY_COMMON_STAT_10BTFD	 	(0x1000)
-#define PHY_COMMON_STAT_10BTHD	 	(0x0800)
-#define PHY_COMMON_STAT_100BT2FD 	(0x0400)
-#define PHY_COMMON_STAT_100BT2HD 	(0x0200)
-#define PHY_COMMON_STAT_EXT_STAT 	(0x0100)
-#define PHY_COMMON_STAT_RES1	 	(0x0080)
-#define PHY_COMMON_STAT_MF_PSUP	 	(0x0040)
-#define PHY_COMMON_STAT_AN_COMP  	(0x0020)
-#define PHY_COMMON_STAT_RMT_FLT	 	(0x0010)
-#define PHY_COMMON_STAT_AN_CAP	 	(0x0008)
-#define PHY_COMMON_STAT_LNK_STAT 	(0x0004)
-#define PHY_COMMON_STAT_JAB_DTCT 	(0x0002)
-#define PHY_COMMON_STAT_EXT_CAP	 	(0x0001)
+#define PHY_COMMON_STAT_100BT4		(0x8000)
+#define PHY_COMMON_STAT_100BXFD		(0x4000)
+#define PHY_COMMON_STAT_100BXHD		(0x2000)
+#define PHY_COMMON_STAT_10BTFD		(0x1000)
+#define PHY_COMMON_STAT_10BTHD		(0x0800)
+#define PHY_COMMON_STAT_100BT2FD	(0x0400)
+#define PHY_COMMON_STAT_100BT2HD	(0x0200)
+#define PHY_COMMON_STAT_EXT_STAT	(0x0100)
+#define PHY_COMMON_STAT_RES1		(0x0080)
+#define PHY_COMMON_STAT_MF_PSUP		(0x0040)
+#define PHY_COMMON_STAT_AN_COMP		(0x0020)
+#define PHY_COMMON_STAT_RMT_FLT		(0x0010)
+#define PHY_COMMON_STAT_AN_CAP		(0x0008)
+#define PHY_COMMON_STAT_LNK_STAT	(0x0004)
+#define PHY_COMMON_STAT_JAB_DTCT	(0x0002)
+#define PHY_COMMON_STAT_EXT_CAP		(0x0001)
 
 /* AUTO_ADV Auto-neg Advert Register Bit Fields */
-#define PHY_COMMON_AUTO_ADV_NP       	(0x8000)
+#define PHY_COMMON_AUTO_ADV_NP		(0x8000)
 #define PHY_COMMON_AUTO_ADV_RES1        (0x4000)
 #define PHY_COMMON_AUTO_ADV_RMT_FLT     (0x2000)
 #define PHY_COMMON_AUTO_ADV_RES2        (0x1000)
 #define PHY_COMMON_AUTO_ADV_AS_PAUSE    (0x0800)
 #define PHY_COMMON_AUTO_ADV_PAUSE       (0x0400)
 #define PHY_COMMON_AUTO_ADV_100BT4      (0x0200)
-#define PHY_COMMON_AUTO_ADV_100BTXFD   	(0x0100)
+#define PHY_COMMON_AUTO_ADV_100BTXFD	(0x0100)
 #define PHY_COMMON_AUTO_ADV_100BTX      (0x0080)
-#define PHY_COMMON_AUTO_ADV_10BTFD   	(0x0040)
-#define PHY_COMMON_AUTO_ADV_10BT     	(0x0020)
+#define PHY_COMMON_AUTO_ADV_10BTFD	(0x0040)
+#define PHY_COMMON_AUTO_ADV_10BT	(0x0020)
 #define PHY_COMMON_AUTO_ADV_SEL_FLD_MA  (0x001F)
 #define PHY_COMMON_AUTO_ADV_802_9       (0x0002)
 #define PHY_COMMON_AUTO_ADV_802_3       (0x0001)
 
 /* AUTO_LNKB Auto-neg Link Ability Register Bit Fields */
-#define PHY_COMMON_AUTO_LNKB_NP       	(0x8000)
+#define PHY_COMMON_AUTO_LNKB_NP		(0x8000)
 #define PHY_COMMON_AUTO_LNKB_ACK        (0x4000)
 #define PHY_COMMON_AUTO_LNKB_RMT_FLT    (0x2000)
 #define PHY_COMMON_AUTO_LNKB_RES2       (0x1000)
@@ -107,8 +107,8 @@
 #define PHY_COMMON_AUTO_LNKB_100BT4     (0x0200)
 #define PHY_COMMON_AUTO_LNKB_100BTXFD   (0x0100)
 #define PHY_COMMON_AUTO_LNKB_100BTX     (0x0080)
-#define PHY_COMMON_AUTO_LNKB_10BTFD   	(0x0040)
-#define PHY_COMMON_AUTO_LNKB_10BT     	(0x0020)
+#define PHY_COMMON_AUTO_LNKB_10BTFD	(0x0040)
+#define PHY_COMMON_AUTO_LNKB_10BT	(0x0020)
 #define PHY_COMMON_AUTO_LNKB_SEL_FLD_MA (0x001F)
 #define PHY_COMMON_AUTO_LNKB_802_9      (0x0002)
 #define PHY_COMMON_AUTO_LNKB_802_3      (0x0001)
@@ -159,20 +159,20 @@
 #define PHY_LXT971_PORT_CFG_FIBER_SEL   (0x0001)
 
 /* STAT2 Status Register #2 Bit Fields */
-#define PHY_LXT971_STAT2_RES1   	(0x8000)
-#define PHY_LXT971_STAT2_100BTX 	(0x4000)
+#define PHY_LXT971_STAT2_RES1		(0x8000)
+#define PHY_LXT971_STAT2_100BTX		(0x4000)
 #define PHY_LXT971_STAT2_TX_STATUS	(0x2000)
 #define PHY_LXT971_STAT2_RX_STATUS	(0x1000)
 #define PHY_LXT971_STAT2_COL_STATUS	(0x0800)
-#define PHY_LXT971_STAT2_LINK   	(0x0400)
+#define PHY_LXT971_STAT2_LINK		(0x0400)
 #define PHY_LXT971_STAT2_DUPLEX_MODE	(0x0200)
 #define PHY_LXT971_STAT2_AUTO_NEG	(0x0100)
-#define PHY_LXT971_STAT2_AUTO_NEG_COMP 	(0x0080)
-#define PHY_LXT971_STAT2_RES2   	(0x0040)
+#define PHY_LXT971_STAT2_AUTO_NEG_COMP	(0x0080)
+#define PHY_LXT971_STAT2_RES2		(0x0040)
 #define PHY_LXT971_STAT2_POLARITY	(0x0020)
-#define PHY_LXT971_STAT2_PAUSE  	(0x0010)
-#define PHY_LXT971_STAT2_ERROR  	(0x0008)
-#define PHY_LXT971_STAT2_RES3   	(0x0007)
+#define PHY_LXT971_STAT2_PAUSE		(0x0010)
+#define PHY_LXT971_STAT2_ERROR		(0x0008)
+#define PHY_LXT971_STAT2_RES3		(0x0007)
 
 /* INT_ENABLE Interrupt Enable Register Bit Fields */
 #define PHY_LXT971_INT_ENABLE_RES1      (0xFF00)
@@ -225,11 +225,11 @@
 #define PHY_LXT971_LED_CFG_SPEED        (0x0000)
 
 /* DIG_CFG Digitial Configuration Register Bit Fields */
-#define PHY_LXT971_DIG_CFG_RES1 	(0xF000)
+#define PHY_LXT971_DIG_CFG_RES1		(0xF000)
 #define PHY_LXT971_DIG_CFG_MII_DRIVE	(0x0800)
-#define PHY_LXT971_DIG_CFG_RES2 	(0x0400)
+#define PHY_LXT971_DIG_CFG_RES2		(0x0400)
 #define PHY_LXT971_DIG_CFG_SHOW_SYMBOL	(0x0200)
-#define PHY_LXT971_DIG_CFG_RES3 	(0x01FF)
+#define PHY_LXT971_DIG_CFG_RES3		(0x01FF)
 
 #define PHY_LXT971_MDIO_MAX_CLK		(8000000)
 #define PHY_MDIO_MAX_CLK		(2500000)