diff options
| author | MengDongyang <daniel.meng@rock-chips.com> | 2016-08-24 12:02:17 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2016-09-22 07:32:22 -0600 |
| commit | b44566c4ce5ca95264860f78a6ba1d26a5edb5ea (patch) | |
| tree | 74a006d02b8c685ed8f8efd6332e9dfa927ef133 /include/linux | |
| parent | aa89b554b7bcb6b0d1fd1ba6ac39384d93b4b002 (diff) | |
| download | u-boot-imx-b44566c4ce5ca95264860f78a6ba1d26a5edb5ea.zip u-boot-imx-b44566c4ce5ca95264860f78a6ba1d26a5edb5ea.tar.gz u-boot-imx-b44566c4ce5ca95264860f78a6ba1d26a5edb5ea.tar.bz2 | |
usb: xhci-rockchip: add rockchip dwc3 controller driver
This patch add support for rockchip dwc3 controller, which corresponding
to the two type-C port on rk3399 evb.
Only support usb2.0 currently for we have not enable the usb3.0 phy
driver and PD(fusb302) driver.
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/usb/dwc3.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h index 6d1e365..a027446 100644 --- a/include/linux/usb/dwc3.h +++ b/include/linux/usb/dwc3.h @@ -180,7 +180,21 @@ struct dwc3 { /* offset: 0xC100 */ /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) +#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30) +#define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) +#define DWC3_GUSB2PHYCFG_PHYIF (1 << 3) + +/* Global USB2 PHY Configuration Mask */ +#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK (0xf << 10) + +/* Global USB2 PHY Configuration Offset */ +#define DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET 10 + +#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \ + DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET) +#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \ + DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET) /* Global USB3 PIPE Control Register */ #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31) |