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authorWolfgang Grandegger <wg@grandegger.com>2009-01-16 18:55:54 +0100
committerScott Wood <scottwood@freescale.com>2009-01-23 10:32:51 -0600
commit6c869637fef31e66380f0ea1d49690a2e26ec0d7 (patch)
tree0ac7c4b616f8a1a725b89ba98585689383f2784e /include/linux/mtd/bbm.h
parentc70564e6b1bd08f3230182392238907f3531a87e (diff)
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NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS
This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'include/linux/mtd/bbm.h')
-rw-r--r--include/linux/mtd/bbm.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h
index abf8f1a..7db2546 100644
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -18,8 +18,8 @@
#define __LINUX_MTD_BBM_H
/* The maximum number of NAND chips in an array */
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS 8
+#ifndef CONFIG_SYS_NAND_MAX_CHIPS
+#define CONFIG_SYS_NAND_MAX_CHIPS 1
#endif
/**
@@ -48,10 +48,10 @@
*/
struct nand_bbt_descr {
int options;
- int pages[NAND_MAX_CHIPS];
+ int pages[CONFIG_SYS_NAND_MAX_CHIPS];
int offs;
int veroffs;
- uint8_t version[NAND_MAX_CHIPS];
+ uint8_t version[CONFIG_SYS_NAND_MAX_CHIPS];
int len;
int maxblocks;
int reserved_block_code;