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authorEnric Balletbo i Serra <eballetbo@iseebcn.com>2013-09-10 11:12:26 +0200
committerTom Rini <trini@ti.com>2013-10-07 07:43:46 -0400
commit94b32f60fe8f21b60e8e1f31dcb27bcec7aa1fff (patch)
treed7397cda87620933cacdfa5c64ead897d634cabd /include/linux/crc7.h
parente3cf9692053a4989f76a8964ab7d29df4fee90c0 (diff)
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ARM: IGEP0033: Update timing to run DDR at 400MHz.
We can run the DDR at 400MHz, so update the timings for that purpose. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
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