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authorTom Rix <Tom.Rix@windriver.com>2009-09-27 07:47:24 -0500
committerTom Rix <Tom.Rix@windriver.com>2009-10-03 09:04:41 -0500
commit6dceeaa679ca3326a8dd1ddbd535a0651ec231bb (patch)
tree816d2d45cb117c907f9a56d8683983f00109d286 /include/ks8721.h
parent203e6fb2da1d5406b3df205432e38c20c441d5dc (diff)
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Add support for Eukrea CPUAT91 SBC
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Diffstat (limited to 'include/ks8721.h')
-rw-r--r--include/ks8721.h78
1 files changed, 78 insertions, 0 deletions
diff --git a/include/ks8721.h b/include/ks8721.h
new file mode 100644
index 0000000..185d9bd
--- /dev/null
+++ b/include/ks8721.h
@@ -0,0 +1,78 @@
+/*
+ * NOTE: MICREL ethernet Physical layer
+ *
+ * Version: KS8721.h
+ *
+ * Authors: Eric Benard (based on dm9161.h)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+/* MICREL PHYSICAL LAYER TRANSCEIVER KS8721 */
+
+#define KS8721_BMCR 0
+#define KS8721_BMSR 1
+#define KS8721_PHYID1 2
+#define KS8721_PHYID2 3
+#define KS8721_ANAR 4
+#define KS8721_ANLPAR 5
+#define KS8721_ANER 6
+#define KS8721_RECR 15
+#define KS8721_MDINTR 27
+#define KS8721_100BT 31
+
+/* --Bit definitions: KS8721_BMCR */
+#define KS8721_RESET (1 << 15)
+#define KS8721_LOOPBACK (1 << 14)
+#define KS8721_SPEED_SELECT (1 << 13)
+#define KS8721_AUTONEG (1 << 12)
+#define KS8721_POWER_DOWN (1 << 11)
+#define KS8721_ISOLATE (1 << 10)
+#define KS8721_RESTART_AUTONEG (1 << 9)
+#define KS8721_DUPLEX_MODE (1 << 8)
+#define KS8721_COLLISION_TEST (1 << 7)
+#define KS8721_DISABLE (1 << 0)
+
+/*--Bit definitions: KS8721_BMSR */
+#define KS8721_100BASE_T4 (1 << 15)
+#define KS8721_100BASE_TX_FD (1 << 14)
+#define KS8721_100BASE_T4_HD (1 << 13)
+#define KS8721_10BASE_T_FD (1 << 12)
+#define KS8721_10BASE_T_HD (1 << 11)
+#define KS8721_MF_PREAMB_SUPPR (1 << 6)
+#define KS8721_AUTONEG_COMP (1 << 5)
+#define KS8721_REMOTE_FAULT (1 << 4)
+#define KS8721_AUTONEG_ABILITY (1 << 3)
+#define KS8721_LINK_STATUS (1 << 2)
+#define KS8721_JABBER_DETECT (1 << 1)
+#define KS8721_EXTEND_CAPAB (1 << 0)
+
+/*--Bit definitions: KS8721_PHYID */
+#define KS8721_PHYID_OUI 0x0885
+#define KS8721_LSB_MASK 0x3F
+
+#define KS8721BL_MODEL 0x21
+#define KS8721_MODELMASK 0x3F0
+#define KS8721BL_REV 0x9
+#define KS8721_REVMASK 0xF
+
+/*--Bit definitions: KS8721_ANAR, KS8721_ANLPAR */
+#define KS8721_NP (1 << 15)
+#define KS8721_ACK (1 << 14)
+#define KS8721_RF (1 << 13)
+#define KS8721_PAUSE (1 << 10)
+#define KS8721_T4 (1 << 9)
+#define KS8721_TX_FDX (1 << 8)
+#define KS8721_TX_HDX (1 << 7)
+#define KS8721_10_FDX (1 << 6)
+#define KS8721_10_HDX (1 << 5)
+#define KS8721_AN_IEEE_802_3 0x0001
+
+/****************** function prototypes **********************/
+unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac);
+unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac);
+unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status);
+unsigned char ks8721_initphy(AT91PS_EMAC p_mac);