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author | Grzegorz Bernacki <gjb@semihalf.com> | 2008-01-16 15:12:47 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-01-17 09:31:58 +0100 |
commit | 334e442e6fac59be91244063e9b3f6ca25e8daf8 (patch) | |
tree | 8e3ba14866674209e364e7617efc647da1d21168 /include/ft_build.h | |
parent | 4c9e98ace78e7de972adf7da7135a46ec0a4ee7e (diff) | |
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Set ips dividor to 1/4 of csb clock.
Previous setting cause ips clock to be out of spec. This bug was found by John
Rigby from Freescale.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Diffstat (limited to 'include/ft_build.h')
0 files changed, 0 insertions, 0 deletions