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| author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2012-08-13 22:50:53 +0200 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2012-09-17 19:51:45 -0500 |
| commit | 9c60e75e05dab5a0197728b6a940aaac02762936 (patch) | |
| tree | 6fda8b0d612fbdacbded796e47fb39914529b24d /include/fsl_nfc.h | |
| parent | 1884d6577e6b298ab2966d7d8fd7be888c3b7332 (diff) | |
| download | u-boot-imx-9c60e75e05dab5a0197728b6a940aaac02762936.zip u-boot-imx-9c60e75e05dab5a0197728b6a940aaac02762936.tar.gz u-boot-imx-9c60e75e05dab5a0197728b6a940aaac02762936.tar.bz2 | |
mxc nand: Homogenize IP revisions with Linux
Use the same IP revisions as in Linux in order to make the comparison more
clear.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'include/fsl_nfc.h')
| -rw-r--r-- | include/fsl_nfc.h | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/include/fsl_nfc.h b/include/fsl_nfc.h index 6618089..ff537b4 100644 --- a/include/fsl_nfc.h +++ b/include/fsl_nfc.h @@ -33,7 +33,7 @@ * to support up to 2K byte pagesize nand. * Reading or writing a 2K page requires 4 FDI/FDO cycles. * - * MX25 and MX35 have version 1.1, which has: + * MX25 and MX35 have version 2.1, which has: * 8 512-byte main buffers and * 8 64-byte spare buffers * to support up to 4K byte pagesize nand. @@ -42,10 +42,12 @@ */ #if defined(CONFIG_MX27) || defined(CONFIG_MX31) #define MXC_NFC_V1 -#define is_mxc_nfc_11() 0 +#define is_mxc_nfc_1() 1 +#define is_mxc_nfc_21() 0 #elif defined(CONFIG_MX25) || defined(CONFIG_MX35) -#define MXC_NFC_V1_1 -#define is_mxc_nfc_11() 1 +#define MXC_NFC_V2_1 +#define is_mxc_nfc_1() 0 +#define is_mxc_nfc_21() 1 #else #error "MXC NFC implementation not supported" #endif @@ -55,7 +57,7 @@ #define NAND_MXC_SPARE_BUF_SIZE 16 #define NAND_MXC_REG_OFFSET 0xe00 #define NAND_MXC_2K_MULTI_CYCLE -#elif defined(MXC_NFC_V1_1) +#elif defined(MXC_NFC_V2_1) #define NAND_MXC_NR_BUFS 8 #define NAND_MXC_SPARE_BUF_SIZE 64 #define NAND_MXC_REG_OFFSET 0x1e00 @@ -86,7 +88,7 @@ struct fsl_nfc_regs { u16 nf_wrprst; u16 config1; u16 config2; -#elif defined(MXC_NFC_V1_1) +#elif defined(MXC_NFC_V2_1) u16 reserved2[2]; u16 buf_addr; u16 flash_addr; @@ -153,7 +155,7 @@ struct fsl_nfc_regs { */ #define NFC_INT 0x8000 -#ifdef MXC_NFC_V1_1 +#ifdef MXC_NFC_V2_1 #define NFC_4_8N_ECC (1 << 0) #endif #define NFC_SP_EN (1 << 2) |