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author | Anish Trivedi <anish@freescale.com> | 2010-07-16 12:35:32 -0500 |
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committer | Anish Trivedi <anish@freescale.com> | 2010-07-20 09:50:23 -0500 |
commit | 1bc5e5f2cee211a74ee79e0eb5f7f37a3db387f4 (patch) | |
tree | 01f3f940cf9883c7b3291e413d090262abcf49c4 /include/fsl_esdhc.h | |
parent | 592ec82029b2c69386bdf9c82af4614687afe191 (diff) | |
download | u-boot-imx-1bc5e5f2cee211a74ee79e0eb5f7f37a3db387f4.zip u-boot-imx-1bc5e5f2cee211a74ee79e0eb5f7f37a3db387f4.tar.gz u-boot-imx-1bc5e5f2cee211a74ee79e0eb5f7f37a3db387f4.tar.bz2 |
ENGR00125036 Uboot Add eMMC 4.4 support
Enable DDR mode on ESDHC controller and mmc library
Enable 8-bit support in mmc library
Signed-off-by: Anish Trivedi <anish@freescale.com>
Diffstat (limited to 'include/fsl_esdhc.h')
-rw-r--r-- | include/fsl_esdhc.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 9f48afe..a0b1f5c 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -116,6 +116,7 @@ #define XFERTYP_RSPTYP_48_BUSY 0x00030000 #define XFERTYP_MSBSEL 0x00000020 #define XFERTYP_DTDSEL 0x00000010 +#define XFERTYP_DDR_EN 0x00000008 #define XFERTYP_AC12EN 0x00000004 #define XFERTYP_BCEN 0x00000002 #define XFERTYP_DMAEN 0x00000001 @@ -146,6 +147,15 @@ #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 #define ESDHC_HOSTCAPBLT_HSS 0x00200000 +#define ESDHC_HOSTVER_VVN_MASK 0x0000ff00 +#define ESDHC_HOSTVER_VVN_SHIFT 8 +#define ESDHC_HOSTVER_DDR_SUPPORT 0x13 + +#define ESDHC_DLLCTRL_SLV_OVERRIDE_VAL 12 +#define ESDHC_DLLCTRL_SLV_OVERRIDE_VAL_MASK 0x0000FC00 +#define ESDHC_DLLCTRL_SLV_OVERRIDE_VAL_SHIFT 10 +#define ESDHC_DLLCTRL_SLV_OVERRIDE 0x200 + struct fsl_esdhc_cfg { u32 esdhc_base; u32 no_snoop; |