summaryrefslogtreecommitdiff
path: root/include/fsl_diu_fb.h
diff options
context:
space:
mode:
authorHolger Brunck <holger.brunck@keymile.com>2011-05-31 02:12:52 +0000
committerU-Boot <uboot@lilith.(none)>2011-05-31 19:46:19 +0200
commit8612b7015400e8b897ed3aeba03baf47cfbf1e94 (patch)
tree52b02980fc960f9402216ad1251b5f8c18619405 /include/fsl_diu_fb.h
parentd3920144e132eb7f30d40d4a5ad13ae85d2e2818 (diff)
downloadu-boot-imx-8612b7015400e8b897ed3aeba03baf47cfbf1e94.zip
u-boot-imx-8612b7015400e8b897ed3aeba03baf47cfbf1e94.tar.gz
u-boot-imx-8612b7015400e8b897ed3aeba03baf47cfbf1e94.tar.bz2
arm/km: update mgcoge3un board support
We change default settings for egiga on mgcoge3un. The reason we need this is that we have the gig port on mgcoge3un connected using a back-to-back pair of PHYs. There are no magnetics and because of that the port has to be run with a fixd configuration and auto-negotiation must be disabled. In the default mode the egiga driver uses autoneg to determine port speed - which defaults to 1G (we need 100M full duplex). Add wait for the GPIO line connected to mgcoge3ne before starting mgcoge3un. A board specific ethernet present function was added, because on this board ethernet is always present. The BOCO FPGA access was enhanced and changed to use register definitions. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Prafulla Wadaskar <prafulla@marvell.com>
Diffstat (limited to 'include/fsl_diu_fb.h')
0 files changed, 0 insertions, 0 deletions