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| author | York Sun <yorksun@freescale.com> | 2014-08-01 15:51:00 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-09-25 08:36:18 -0700 |
| commit | 1d71efbb0345ff3a8ac45e62bef36813abe1703e (patch) | |
| tree | f607e330c200428f1e37a1fd3aba8873efdbb634 /include/fsl_ddr_sdram.h | |
| parent | e211c12e773881f6bef60143df4764402a56de34 (diff) | |
| download | u-boot-imx-1d71efbb0345ff3a8ac45e62bef36813abe1703e.zip u-boot-imx-1d71efbb0345ff3a8ac45e62bef36813abe1703e.tar.gz u-boot-imx-1d71efbb0345ff3a8ac45e62bef36813abe1703e.tar.bz2 | |
driver/ddr: Restruct driver to allow standalone memory space
U-boot has been initializing DDR for the main memory. The presumption
is the memory stays as a big continuous block, either linear or
interleaved. This change is to support putting some DDR controllers
to separated space without counting into main memory. The standalone
memory controller could use different number of DIMM slots.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/fsl_ddr_sdram.h')
| -rw-r--r-- | include/fsl_ddr_sdram.h | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index 987119b..d03901f 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -379,12 +379,20 @@ typedef struct memctl_options_s { unsigned int trwt; /* read-to-write turnaround */ } memctl_options_t; -extern phys_size_t fsl_ddr_sdram(void); -extern phys_size_t fsl_ddr_sdram_size(void); +phys_size_t fsl_ddr_sdram(void); +phys_size_t fsl_ddr_sdram_size(void); +phys_size_t fsl_other_ddr_sdram(unsigned long long base, + unsigned int first_ctrl, + unsigned int num_ctrls, + unsigned int dimm_slots_per_ctrl, + int (*board_need_reset)(void), + void (*board_reset)(void), + void (*board_de_reset)(void)); extern int fsl_use_spd(void); -extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, - unsigned int ctrl_num, int step); +void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + unsigned int ctrl_num, int step); u32 fsl_ddr_get_intl3r(void); +void print_ddr_info(unsigned int start_ctrl); static void __board_assert_mem_reset(void) { |