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author | Tom Rini <trini@ti.com> | 2014-09-26 09:57:52 -0400 |
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committer | Tom Rini <trini@ti.com> | 2014-09-26 09:57:52 -0400 |
commit | 2c2277f15cbaa9533ef8aead7328c3f605251147 (patch) | |
tree | 9e7ee343a1f75ecdd57a7fa8025eab2464654ecb /include/fsl_ddr.h | |
parent | 2c3dc792b6df16970077c0d64085e29f1f85d4c8 (diff) | |
parent | c7eae7fcb11bc7dab519fca8d8902f1fbc5c3c76 (diff) | |
download | u-boot-imx-2c2277f15cbaa9533ef8aead7328c3f605251147.zip u-boot-imx-2c2277f15cbaa9533ef8aead7328c3f605251147.tar.gz u-boot-imx-2c2277f15cbaa9533ef8aead7328c3f605251147.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'include/fsl_ddr.h')
-rw-r--r-- | include/fsl_ddr.h | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 5c49b22..675557a 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -15,6 +15,11 @@ #include <common_timing_params.h> +#ifndef CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS +/* All controllers are for main memory */ +#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_NUM_DDR_CONTROLLERS +#endif + #ifdef CONFIG_SYS_FSL_DDR_LE #define ddr_in32(a) in_le32(a) #define ddr_out32(a, v) out_le32(a, v) @@ -57,6 +62,13 @@ typedef struct { memctl_options_t memctl_opts[CONFIG_SYS_NUM_DDR_CTLRS]; common_timing_params_t common_timing_params[CONFIG_SYS_NUM_DDR_CTLRS]; fsl_ddr_cfg_regs_t fsl_ddr_config_reg[CONFIG_SYS_NUM_DDR_CTLRS]; + unsigned int first_ctrl; + unsigned int num_ctrls; + unsigned long long mem_base; + unsigned int dimm_slots_per_ctrl; + int (*board_need_mem_reset)(void); + void (*board_mem_reset)(void); + void (*board_mem_de_reset)(void); } fsl_ddr_info_t; /* Compute steps */ @@ -72,7 +84,6 @@ typedef struct { unsigned long long fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, unsigned int size_only); - const char *step_to_string(unsigned int step); unsigned int compute_fsl_memctl_config_regs(const memctl_options_t *popts, @@ -102,7 +113,7 @@ void fsl_ddr_set_lawbar( int fsl_ddr_interactive_env_var_exists(void); unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set); void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd, - unsigned int ctrl_num); + unsigned int ctrl_num, unsigned int dimm_slots_per_ctrl); int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); unsigned int check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr); |