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authorYork Sun <yorksun@freescale.com>2015-01-06 13:19:01 -0800
committerYork Sun <yorksun@freescale.com>2015-02-24 13:10:16 -0800
commit4f2532c4a4a34f0241ef9bc921044772f19f928d (patch)
tree29eca9e67cf592301bba0785418178816f7a82b9 /include/fsl-mc/fsl_mc_sys.h
parent1478fdef526f7881f809f6dcce1d63fc6cd080d6 (diff)
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armv8/ls2085a_emu: Enable sync of refresh
Enable sync of DDR refresh for LS2085a platform. GPP DDR controllers stay in sync. DP-DDR has only one controller so it does no harm. Signed-off-by: York Sun <yorksun@freescale.com>
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