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authorStefano Babic <sbabic@denx.de>2010-06-29 11:47:48 +0200
committerStefano Babic <sbabic@denx.de>2010-10-13 18:09:31 +0200
commit3b8ac464f25581a7d22b303a9154c05e0c7f40a8 (patch)
tree47f8c1789a5667ef0d31daed228b9b70386138ed /include/fpga.h
parentf8f8acd7249d224ed5f9704a5738c469b137bc8e (diff)
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FPGA: add support for downloading Lattice bitstream
The patch adds support to load a Lattice's bitstream image (called VME file) into a Lattice FPGA. The code containing the state machine delivered as part of Lattice's ispVMtools is integrated. The FPGA is programmed using the JTAG interface. The board maintainer must provide accessors to drive the JTAG signals TCK, TMS, TDI and to get the value of the input signal TDO. Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'include/fpga.h')
-rw-r--r--include/fpga.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fpga.h b/include/fpga.h
index 84d7b9f..ac24f2b 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -61,6 +61,7 @@ typedef enum { /* typedef fpga_type */
fpga_min_type, /* range check value */
fpga_xilinx, /* Xilinx Family) */
fpga_altera, /* unimplemented */
+ fpga_lattice, /* Lattice family */
fpga_undefined /* invalid range check value */
} fpga_type; /* end, typedef fpga_type */