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authorWolfgang Denk <wd@denx.de>2011-10-04 22:08:13 +0200
committerWolfgang Denk <wd@denx.de>2011-10-04 22:08:13 +0200
commit1fed668b3fb9c35932f58af00ff5539239fa4e1d (patch)
treeeaaaead8ca19924af1823caae040f504be9b6d98 /include/fm_eth.h
parentc52575350fd6e794717f6bee4f81dbb8038fe22e (diff)
parent6d7b061af153bc5beb633c3bd15348284716a067 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
Diffstat (limited to 'include/fm_eth.h')
-rw-r--r--include/fm_eth.h115
1 files changed, 115 insertions, 0 deletions
diff --git a/include/fm_eth.h b/include/fm_eth.h
new file mode 100644
index 0000000..c7c6882
--- /dev/null
+++ b/include/fm_eth.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __FM_ETH_H__
+#define __FM_ETH_H__
+
+#include <common.h>
+#include <asm/types.h>
+#include <asm/fsl_enet.h>
+
+enum fm_port {
+ FM1_DTSEC1,
+ FM1_DTSEC2,
+ FM1_DTSEC3,
+ FM1_DTSEC4,
+ FM1_DTSEC5,
+ FM1_10GEC1,
+ FM2_DTSEC1,
+ FM2_DTSEC2,
+ FM2_DTSEC3,
+ FM2_DTSEC4,
+ FM2_10GEC1,
+ NUM_FM_PORTS,
+};
+
+enum fm_eth_type {
+ FM_ETH_1G_E,
+ FM_ETH_10G_E,
+};
+
+#define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xe1120)
+#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xf1000)
+
+#define DEFAULT_FM_MDIO_NAME "FSL_MDIO0"
+#define DEFAULT_FM_TGEC_MDIO_NAME "FM_TGEC_MDIO"
+
+/* Fman ethernet info struct */
+#define FM_ETH_INFO_INITIALIZER(idx, pregs) \
+ .fm = idx, \
+ .phy_regs = (void *)pregs, \
+ .enet_if = PHY_INTERFACE_MODE_NONE, \
+
+#define FM_DTSEC_INFO_INITIALIZER(idx, n) \
+{ \
+ FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR) \
+ .index = idx, \
+ .num = n - 1, \
+ .type = FM_ETH_1G_E, \
+ .port = FM##idx##_DTSEC##n, \
+ .rx_port_id = RX_PORT_1G_BASE + n - 1, \
+ .tx_port_id = TX_PORT_1G_BASE + n - 1, \
+ .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
+ offsetof(struct ccsr_fman, mac_1g[n-1]),\
+}
+
+#define FM_TGEC_INFO_INITIALIZER(idx, n) \
+{ \
+ FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \
+ .index = idx, \
+ .num = n - 1, \
+ .type = FM_ETH_10G_E, \
+ .port = FM##idx##_10GEC##n, \
+ .rx_port_id = RX_PORT_10G_BASE + n - 1, \
+ .tx_port_id = TX_PORT_10G_BASE + n - 1, \
+ .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
+ offsetof(struct ccsr_fman, mac_10g[n-1]),\
+}
+
+struct fm_eth_info {
+ u8 enabled;
+ u8 fm;
+ u8 num;
+ u8 phy_addr;
+ int index;
+ u16 rx_port_id;
+ u16 tx_port_id;
+ enum fm_port port;
+ enum fm_eth_type type;
+ void *phy_regs;
+ phy_interface_t enet_if;
+ u32 compat_offset;
+ struct mii_dev *bus;
+};
+
+struct tgec_mdio_info {
+ struct tgec_mdio_controller *regs;
+ char *name;
+};
+
+int fm_tgec_mdio_init(bd_t *bis, struct tgec_mdio_info *info);
+int fm_standard_init(bd_t *bis);
+void fman_enet_init(void);
+void fdt_fixup_fman_ethernet(void *fdt);
+phy_interface_t fm_info_get_enet_if(enum fm_port port);
+void fm_info_set_phy_address(enum fm_port port, int address);
+void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus);
+void fm_disable_port(enum fm_port port);
+
+#endif